RF Power Amplifier Supply Switching for Low-Power Efficiency
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Solution Overview
Problem
Current wireless communication apparatuses, such as mobile phones, face challenges in reducing power consumption, especially at low power levels, as existing techniques like envelope tracking mode are not effective and result in inefficiencies due to high power consumption by high-speed DC-DC converters.
Innovation Solution
A wireless communication apparatus with a power amplifying circuit, a source voltage generating circuit, and a bias control circuit that switches between envelope tracking mode and variable control mode based on output power levels, adjusting source voltage and bias to optimize power consumption by using a fixed voltage and bias at low power levels.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Use of energy by moving object
If envelope tracking mode is used to improve power added efficiency at low power levels, then power consumption is reduced, but the complexity of the system increases due to requiring high-speed DC-DC converters
Solution Approach 1:
The patent segments the operation into two distinct modes: envelope tracking mode for low power levels (0-15 dBm) and linear mode for high power levels (above 15 dBm). This segmentation allows the system to use the complex envelope tracking mode only when necessary for power savings, while avoiding its complexity at high power levels where linear mode is sufficient.
Solution Approach 2:
The patent implements dynamic switching between envelope tracking mode and linear mode based on the current power level requirements. The system dynamically adjusts its operating mode to optimize the trade-off between power consumption and system complexity, using envelope tracking only when the power level warrants the additional complexity.
2Device complexity
If fixed source voltage is used to simplify the system, then device complexity is reduced, but power added efficiency deteriorates at low power levels due to unnecessary DC power loss
Solution Approach 1:
The patent implements dynamic switching between envelope tracking mode and linear mode based on the current power level requirements. The system dynamically adjusts its operating mode to optimize the trade-off between power consumption and system complexity, using envelope tracking only when the power level warrants the additional complexity.
Solution Approach 2:
The patent changes the operating parameters (source voltage and bias) dynamically based on the power level. At low power levels, envelope tracking mode adjusts the source voltage to track the envelope of the modulated signal, improving power added efficiency. At high power levels, the system switches to linear mode with fixed parameters for simplicity.
3Use of energy by moving object
If high-speed DC-DC converter is used to generate tracking source voltage, then power added efficiency is improved, but power consumption of the converter itself increases
Solution Approach 1:
The patent segments the operation into two distinct modes: envelope tracking mode for low power levels (0-15 dBm) and linear mode for high power levels (above 15 dBm). This segmentation allows the system to use the complex envelope tracking mode only when necessary for power savings, while avoiding its complexity at high power levels where linear mode is sufficient.
Solution Approach 2:
The patent applies envelope tracking partially, only for low power levels where it provides the most benefit. By limiting envelope tracking to the 0-15 dBm range and using linear mode for higher powers, the system avoids the excessive power consumption of the DC-DC converter when full envelope tracking would provide minimal additional benefit.
Data Source
AI summary
A high-frequency signal processing apparatus and a wireless communication apparatus can achieve a decrease in power consumption. For example, when an indicated power level to a high-frequency power amplifier is equal to or greater than a second reference value, envelope tracking is performed by causing a source voltage control circuit to control a high-speed DCDC converter using a detection result of an envelope detecting circuit and causing a bias control circuit to indicate a fixed bias value. The source voltage control circuit and the bias control circuit indicate a source voltage and a bias value decreasing in proportion to a decrease in the indicated power level when the indicated power level is in a range of the second reference value to the first reference value, and indicate a fixed source voltage and a fixed bias value when the indicated power level is less than the first reference value.