RF Switch Compensation and Gate Bootstrapping for High-Voltage Biasing
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Solution Overview
Problem
High voltage radio-frequency (RF) switches face challenges in handling voltages exceeding 80 V peak in cellular user equipment and 100 V in cellular base station equipment, with existing solutions compromising performance due to leakage currents and limited voltage handling capabilities.
Innovation Solution
The implementation of a radio-frequency switch device with a compensation network to manage leakage currents and a bootstrapping network that establishes low impedance during the OFF mode and high impedance during the ON mode, enhancing voltage handling capabilities by optimizing biasing conditions.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Strength
If high voltage handling capability is improved to exceed 80V peak in cellular user equipment and 100V in cellular base station equipment, then voltage handling capability is improved, but leakage currents increase causing performance degradation
Solution Approach 1:
A compensation network is introduced as an intermediary circuit between the RF switch and ground, which actively compensates for leakage currents generated by the MOSFET body diodes. The compensation network includes compensation transistors and bias circuits that generate compensating currents to cancel out the harmful leakage currents, thereby maintaining high voltage handling capability without performance degradation
Solution Approach 2:
The patent changes the electrical parameters of the RF switch system by implementing dynamic biasing schemes. Bias circuits generate specific bias voltages and currents that modify the operating parameters of the compensation transistors, enabling them to dynamically adjust their conduction characteristics to match and compensate for the leakage currents at different voltage levels
2Strength
If stacked MOSFET devices are used to achieve high voltage handling, then voltage handling capability is improved, but device complexity increases
Solution Approach 1:
The RF switch is segmented into multiple stacked MOSFET devices (first, second, and third MOSFETs) with individual body terminals. This segmentation allows each transistor to handle a portion of the total voltage, enabling high voltage handling capability while providing separate control points for leakage compensation at each stage
Solution Approach 2:
Compensation networks are introduced as intermediary circuits connected to the body terminals of the stacked MOSFETs. These compensation networks include compensation transistors and bias circuits that actively manage leakage currents without requiring complete redesign of the stacked MOSFET structure, thereby managing complexity through modular addition of compensation elements
3Object-generated harmful factors
If compensation networks are added to manage leakage currents, then leakage current compensation is improved, but device complexity increases
Solution Approach 1:
The compensation network acts as an intermediary system that can be independently designed and optimized. It includes compensation transistors connected to body terminals and bias circuits that generate appropriate compensating signals, providing effective leakage current management through a modular architecture that can be added to existing RF switch designs
Solution Approach 2:
The compensation networks are designed with multi-functionality to handle leakage currents from multiple stacked MOSFETs simultaneously. The bias circuits generate universal bias signals that can compensate for leakage currents across different voltage levels and operating conditions, reducing the need for separate compensation circuits for each transistor
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution effectively improves high voltage handling at RF frequencies by compensating for leakage currents and maintaining performance across varying voltage levels, ensuring reliable operation in high voltage applications.
Implementation Method 1
a first bootstrapping network having a first terminal coupled to a first bias terminal, a second terminal coupled to a gate terminal of the first transistor, and a third terminal coupled to the body terminal of the first transistor, wherein the first bootstrapping network is configured to establish a low impedance path between the gate terminal and the body terminal of the first transistor in response to a first voltage value of the first bias terminal
Implementation Method 2
the first bootstrapping network is configured to establish a high impedance path between the gate terminal and the body terminal of the first transistor in response to a second voltage value of the first bias terminal
Implementation Method 3
a first compensation network coupled between a body terminal of the first transistor and a second source/drain terminal of the second transistor, wherein the first compensation network is configured to establish a path for current flowing between the body terminal of the first transistor and the second source/drain terminal of the second transistor in a first direction and to block current flowing therebetween in a second direction opposite to the first direction
Data Source
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AI summary
A radio frequency switch device includes a first transistor and a second transistor; a compensation network coupled between a body terminal of the first transistor and a source/drain terminal of the second transistor; and a bootstrapping network having a first terminal coupled to a first bias terminal, a second terminal coupled to a gate terminal of the first transistor, and a third terminal coupled to the body terminal of the first transistor, wherein the bootstrapping network establishes a low impedance path between the gate terminal and the body terminal of the first transistor in response to a first voltage value of the first bias terminal, and wherein the bootstrapping network establishes a high impedance path between the gate terminal and the body terminal of the first transistor in response to a second voltage value of the first bias terminal.