RF Switch Bias Bypass for Fast Turn-On and High Q
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Radio Frequency (RF) switches face a design trade-off between achieving fast response times and high power handling while maintaining a high Quality Factor (Q) in the off state, as large bias resistor values are required for high Q but lead to long switching times due to large Resistor-Capacitor (RC) time constants.
Innovation Solution
The implementation of auxiliary shorting switches using local bias networks that bypass gate and drain/source bias resistor ladders during turn-on, along with a regulator circuit for boosting body bias levels during high power conditions, reduces the RC time constant and minimizes body current flow, thereby accelerating switch turn-on and improving power handling.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If large bias resistor values are used to achieve high Q value in the off state, then the Quality Factor is improved, but the Resistor-Capacitor time constant increases causing slow switching times
Solution Approach 1:
The bias network is segmented into multiple parallel resistor branches instead of using a single large resistor. Each branch contains a series combination of resistors and capacitors that are configured to provide different time constants. This segmentation allows the network to provide high impedance at RF frequencies (maintaining high Q) while providing fast discharge paths for the capacitors during switching transitions.
Solution Approach 2:
The bias network uses dynamic RC time constants that change based on the switching state. During the off state, the network presents high impedance to maintain high Q. During turn-on, the capacitors discharge quickly through the resistor network, providing a dynamic time constant that is much shorter than the static RC product would suggest. This dynamic behavior resolves the contradiction between high Q and fast switching.
2Loss of time
If low bias resistor values are used to reduce RC time constant and improve switching speed, then the switching time is reduced, but the Quality Factor decreases due to increased power dissipation
Solution Approach 1:
The bias network is divided into multiple parallel branches, each with series RC combinations. This segmentation creates multiple discharge paths with different time constants, allowing fast switching without requiring a single low-value resistor that would degrade Q. The parallel structure provides equivalent low impedance for fast discharge while maintaining high impedance at RF frequencies.
Solution Approach 2:
The network uses different resistor and capacitor values in series combinations to create optimized time constants for different switching phases. By changing the parameters of individual RC branches rather than using uniform low-value resistors throughout, the system achieves fast switching in specific time windows while maintaining high Q during the off state.
3Loss of time
If additional bias resistor networks are added to accelerate switching, then the switching speed is improved, but the device complexity and DC voltage drop increase
Solution Approach 1:
The bias resistor network serves multiple functions simultaneously: it provides DC bias to the FET gates, maintains high Q during the off state, and enables fast switching through capacitor discharge paths. By making the same network multi-functional rather than adding separate networks for each function, the design achieves fast switching without proportionally increasing complexity.
Solution Approach 2:
The switching acceleration function is merged into the existing bias network by adding series capacitors to the bias resistors. This combination creates a unified structure that performs both biasing and switching acceleration functions. The parallel RC branches are integrated into the bias network topology rather than being added as separate acceleration circuits, reducing overall complexity.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach significantly reduces turn-on and turn-off times while maintaining a high Q value and enhancing power handling by eliminating the need for additional bias resistor networks and reducing DC voltage drop across the bias network.
Implementation Method 1
The speed of turn-on is limited by the Resistor-Capacitor (RC) time constant set by the gate (front) and drain/source (back) resistors and their corresponding capacitances
Implementation Method 2
In the off state, as the RF voltage differential between the drain and source (VDS) increases, the drain-body and source-body junctions begin to generate current
Data Source
AI summary
Improved Radio Frequency (RF) switches are provided herein. According to one aspect, an RF switch comprises one or more stages. In one embodiment, each stage comprises a signal input terminal, a signal output terminal, a control input terminal, and a switching device having a first terminal connected to the signal input terminal, a second terminal connected to the signal output terminal, and a third terminal for controlling the on/off state of the switching device. Each stage includes a first resistor connected in series between the control input terminal and the third terminal, a first bypass switch for electrically bypassing the first resistor, and a second resistor connected in series between the signal input terminal and the signal output terminal. The first resistors form a first bias network, the second resistors form a second bias network, and the switching devices are connected in series.