RF Switch Bias Architecture for Lower Off-State Dissipative Loss

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Solution Overview

Problem

Radio-frequency (RF) switches face significant dissipative losses when in the OFF state, leading to mismatch loss and reduced quality factor in resonant circuits, particularly at higher frequencies due to capacitance and impedance mismatch.

Innovation Solution

The implementation of gate-gate, drain-source, and body-body resistors in biasing architectures for RF switches, specifically in series and shunt arm configurations, to optimize transistor biasing and minimize resistance roll-off over frequency, thereby reducing dissipative losses.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Loss of energy

If conventional RF switches are used without specialized biasing, then device complexity is low, but dissipative losses increase significantly at higher frequencies

Engineering Contradiction:
Improvedissipative lossVSAvoidbias architecture complexity
Core Design Contradiction:
Loss of energyVSDevice complexity

Solution Approach 1:

The bias architecture is segmented into separate series arm bias circuit and shunt arm bias circuit, each with its own gate-gate resistors strategically placed between neighboring transistors. This segmentation allows independent optimization of biasing for each arm, reducing overall dissipative losses while maintaining manageable complexity through modular design.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

Gate-gate resistors are placed locally between specific pairs of neighboring transistors within the switch stack rather than uniformly across all transistors. This localized approach targets specific regions where dissipative losses are most problematic, reducing overall energy loss while minimizing the added complexity of the bias architecture.

Inventive Principle:
Principle #3Local quality

2Reliability

If standard transistor stacking is used, then manufacturing is simple, but resistance roll-off over frequency increases

Engineering Contradiction:
Improvefrequency response stabilityVSAvoidbias circuit implementation
Core Design Contradiction:
ReliabilityVSEase of manufacture

Solution Approach 1:

The gate-gate resistors are merged into the existing transistor stack structure, with resistors placed between adjacent transistor gates in the vertical stack. This integration allows the bias circuit to be manufactured alongside the transistors using standard CMOS processes, improving frequency response stability without significantly complicating the manufacturing process.

Inventive Principle:
Principle #5Merging (Combining)

3Reliability

If simple biasing is used, then device complexity is low, but quality factor reduction occurs in resonant circuits

Engineering Contradiction:
Improvequality factorVSAvoidbias circuit structure
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The bias architecture changes the electrical parameters at the gate nodes of the transistors by introducing gate-gate resistors. These resistors modify the voltage distribution and bias conditions across the transistor stack, improving quality factor in resonant circuits by reducing parasitic effects and optimizing the electrical characteristics without requiring complex external biasing components.

Inventive Principle:
Principle #35Parameter changes

Data Source

PatentUS11394384B2Radio-frequency switches and related circuits
Publication Date: 2022.07.19 SKYWORKS SOLUTIONS INC
  • US11394384B2 patent drawing
  • US11394384B2 patent drawing
  • US11394384B2 patent drawing

AI summary

Radio-frequency switches and related circuits are disclosed. In some embodiments, a switching device can include a series arm having transistors implemented in a stack configuration between first and second nodes. The switching device can further include a shunt arm having transistors implemented in a stack configuration between the first node and a ground node. The switching device can further include a bias architecture having a series arm bias circuit and a shunt arm bias circuit. The series arm bias circuit can be configured to bias the transistors of the series arm and include a gate-gate resistor that couples each pair of neighboring transistors. The shunt arm bias circuit can be configured to bias the transistors of the shunt arm and include a gate-gate resistor that couples each pair of neighboring transistors.