RF Switch Distributed Bias Network for Low Parasitic Loss
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Solution Overview
Problem
Current RF switch technologies face challenges in meeting 5G and future 6G transmission frequency specifications due to reduced switching speed caused by gate and body bias techniques, which increase parasitic losses and affect signal integrity.
Innovation Solution
A series shunt biasing method is implemented using a distributed gate bias network with shunt and series gate resistors in a ladder configuration, and a distributed body bias network with shunt and series body resistors, to provide varying resistance values across nodes, reducing parasitic losses and switching time.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If gate bias techniques are used to control series switch transistors, then the RF switch can be controlled to switch states, but the switching speed is reduced
Solution Approach 1:
The gate bias network is segmented into multiple independent bias lines, each connected to the gate of individual switch transistors through separate resistors. This segmentation allows different bias voltages to be applied to different transistors simultaneously, enabling faster overall switching by eliminating the bottleneck of a single shared bias line.
Solution Approach 2:
Different resistance values are assigned to different gate bias resistors based on their position in the series chain. The bias network provides locally optimized resistance values at each gate node, with lower resistance values for transistors that need faster switching and higher resistance values where slower switching is acceptable, thereby optimizing overall switching speed while maintaining control capability.
2Reliability
If gate bias techniques are used to control the series of switch transistors, then the switch can be controlled, but parasitic losses increase
Solution Approach 1:
The bias network implements local quality by assigning different resistance values to different gate bias resistors based on their position in the series chain. This localized optimization minimizes parasitic losses at each node by using higher resistance values where they have less impact on signal integrity while still providing necessary bias control.
Solution Approach 2:
The patent transitions from a single-dimensional bias control approach to a multi-dimensional bias network with multiple independent bias lines and varying resistance values. This dimensional expansion allows optimization of parasitic losses across different nodes simultaneously, reducing overall energy loss while maintaining control capability.
3Device complexity
If conventional bias networks are used, then the circuit is simple, but the switching speed is reduced and parasitic losses increase
Solution Approach 1:
The bias network is segmented into multiple independent bias lines with separate resistors for each gate node, replacing the conventional single bias line approach. This segmentation enables faster switching by allowing simultaneous biasing of multiple transistors while the modular structure keeps the implementation relatively simple.
Solution Approach 2:
The bias network introduces dynamic elements by using different resistance values at different nodes rather than a uniform resistance throughout. This dynamic configuration allows the network to adapt to the specific switching requirements of each transistor in the series chain, improving switching speed without excessive complexity.
4Ease of manufacture
If uniform resistance values are used in the bias network, then the design is simple, but parasitic losses are not minimized
Solution Approach 1:
The patent applies local quality by using different resistance values for different gate bias resistors based on their position in the series transistor chain. This localized optimization minimizes parasitic losses at each node by tailoring the resistance value to the specific electrical characteristics and switching requirements of that particular transistor, achieving better energy efficiency while remaining manufacturable.
Data Source
AI summary
A radio frequency (RF) switch includes switch transistors coupled in series. The RF switch includes a distributed gate bias network coupled to gate electrodes of the switch transistors. The RF switch also includes a distributed body bias network coupled to body electrodes of the switch transistors.