RF Switch Circuit Biasing for High Power and Low Insertion Loss
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Solution Overview
Problem
Existing radio frequency switch circuits face challenges in achieving high-power mode capabilities due to uneven voltage distribution, leading to non-linearity issues and increased insertion loss, while also occupying a large chip area.
Innovation Solution
A radio frequency switch circuit design with series-connected switch transistor units, where each stage includes specific resistor and capacitor configurations to equalize voltage distribution and reduce non-linearity, incorporating gate and body bias circuits to improve power output and reduce insertion loss.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Power
If multiple switch transistors are stacked in series to improve power output capability, then the power output capability is improved, but the insertion loss increases and the chip area increases
Solution Approach 1:
The patent divides the switch transistor stack into multiple stages, with each stage containing multiple transistors connected in a specific configuration. This segmentation allows for better voltage distribution across stages while maintaining the overall power handling capability, thereby reducing insertion loss compared to a simple series stack.
Solution Approach 2:
The patent transitions from a one-dimensional series connection to a two-dimensional configuration where transistors are arranged in parallel within each stage, and stages are connected in series. This dimensional change enables simultaneous voltage division (reducing insertion loss) and current handling (maintaining power output capability).
2Power
If multiple switch transistors are stacked in series to improve power output capability, then the power output capability is improved, but the chip area occupied increases
Solution Approach 1:
The patent merges multiple transistors within each stage to share common biasing circuits and interconnection structures. This merging reduces the total chip area required compared to having separate circuits for each transistor, while still achieving the desired power output capability through the multi-stage configuration.
Solution Approach 2:
The patent designs each stage to be a universal module that can be replicated, with shared biasing networks and interconnection schemes. This multi-functionality allows the same circuit topology to handle multiple transistors efficiently, reducing overall chip area while maintaining scalability for high power output.
3Power
If more switch transistors are stacked to improve power output capability, then the power output capability is improved, but the voltage swing distribution becomes more uneven
Solution Approach 1:
The patent applies different configurations to different stages, with each stage optimized for its specific position in the stack. Intermediate stages have different transistor arrangements compared to input and output stages, creating local quality variations that ensure uniform voltage swing distribution across all stages while maintaining overall high power capability.
4Power
If more switch transistors are stacked to improve power output capability, then the power output capability is improved, but the linearity deteriorates
Solution Approach 1:
The patent introduces intermediate biasing circuits and connection structures that act as mediators between the input and output stages. These intermediary elements help maintain linear operation by providing stable reference voltages and current paths, preventing the non-linear effects that would otherwise occur in a simple series stack of transistors.
Data Source
AI summary
Disclosed are a radio-frequency switch circuit supporting a high-power mode, a chip, and an electronic device. The radio-frequency switch circuit is formed by connecting multiple stages of switch transistor units in series. In each stage of switch transistor unit, a gate of a first transistor is connected to a gate bias resistor, and the other end of the gate bias resistor is connected to a gate bias voltage; a drain of the first transistor is connected to a source of a first transistor in the previous stage of switch transistor unit, and a source of the first transistor is connected to a drain of a first transistor in the next stage of switch transistor unit; two ends of a path resistor are respectively connected to the drain and source of the first transistor.