RF Switch Body-Bias Circuit for Lower Insertion Loss
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Solution Overview
Problem
The complexity of RF switches in modern mobile phone systems, particularly with the integration of multiple generations like 2G, 3G, LTE, and 5G, leads to increased chip sizes and driving performance requirements, necessitating more negative voltage generators and buffer circuits, which complicates the design and increases insertion loss.
Innovation Solution
The RF switch design incorporates a switch transistor and a bias transistor with a diode-connected configuration, along with an impedance element like a resistor, inductor, or diode, to provide a leakage current path that reduces the turn-on resistance and insertion loss, thereby simplifying the driving circuits and reducing chip size.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If the complexity of the RF switch increases to handle multiple generations (2G, 3G, LTE, 5G), then the adaptability improves, but the device complexity and chip size increase
Solution Approach 1:
The patent combines the negative voltage generation function and buffer circuit functions into integrated circuit blocks that serve multiple switch transistors simultaneously. The negative voltage generator produces a single negative voltage signal that is distributed to control multiple switches, and the buffer circuits are shared among multiple switches, thereby reducing the total number of discrete driving circuits while maintaining support for multiple generations (2G, 3G, LTE, 5G).
Solution Approach 2:
The driving circuits are designed with universal functionality to control multiple types of switch transistors used in different generation modules (2G, 3G, LTE, 5G). The negative voltage generator and buffer circuits can serve multiple purposes across different RF paths, allowing a single driving circuit implementation to handle multiple generations without requiring separate dedicated circuits for each generation.
2Reliability
If the number of negative voltage generators and buffer circuits increases to control gate and body terminals, then the reliability improves, but the device complexity increases
Solution Approach 1:
The patent merges the control functions for gate terminals and body terminals into a coordinated system where the negative voltage generator and buffer circuits work together to simultaneously control multiple switch transistors. This integrated approach ensures reliable control of both terminals while reducing the total number of separate driving circuits needed.
Solution Approach 2:
The negative voltage generator acts as an intermediary that provides the necessary negative voltage signal to the body terminals of multiple switch transistors through shared buffer circuits. This intermediary structure ensures reliable body terminal control without requiring separate dedicated driving circuits for each transistor, thereby maintaining reliability while reducing overall circuit complexity.
3Loss of energy
If additional buffer circuits are added to control the body terminal, then the insertion loss improves, but the chip size increases
Solution Approach 1:
The patent combines the buffer circuit functions into shared circuits that serve multiple switch transistors simultaneously. Instead of having separate buffer circuits for each switch, the design uses integrated buffer circuits that can control multiple switches' body terminals, thereby reducing the total chip area required while still providing the necessary buffering to minimize insertion loss.
Solution Approach 2:
The buffer circuits are designed with universal functionality to control body terminals of multiple switch transistors across different RF paths and generations. This multi-functional design allows a single buffer circuit implementation to serve multiple purposes, reducing the overall chip area while maintaining the insertion loss performance through proper body terminal control.
Data Source
AI summary
A radio frequency (RF) switch includes a switch transistor, and a bias transistor having a body terminal and a first terminal connected to each other, a diode-connected configuration, and configured to provide a first current to a body terminal of the switch transistor corresponding to a voltage applied to a control terminal of the switch transistor.