RF Switch Body-Bias Circuit With Delayed PMOS Gate Timing
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Solution Overview
Problem
Radio-frequency (RF) switch performance is hindered by excessive gate overdrive voltage, leading to prolonged high voltage states in body-biasing PMOS diodes, resulting in leakage current and potential breakdown issues.
Innovation Solution
A bias circuit with a compensation circuit is implemented, delaying the gate voltage applied to a PMOS diode while allowing immediate drain voltage changes, enabling faster body transitions and reducing leakage current through a diode configuration that couples gate and drain of PMOS devices.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If gate voltage is applied immediately to the PMOS diode in the bias circuit, then the body of the switch FET can be charged faster, but the voltage difference between source and drain of the PMOS diode causes excessive leakage current and potential breakdown
Solution Approach 1:
The compensation circuit applies a delayed gate voltage to the PMOS diode after the drain voltage has already transitioned. This preliminary action of delaying the gate voltage prevents excessive voltage difference between source and drain, thereby reducing leakage current and preventing breakdown while still allowing fast body transition through the immediate drain voltage change
2Object-generated harmful factors
If gate voltage is delayed in the PMOS diode, then leakage current is reduced, but the body transition speed is slowed down
Solution Approach 1:
The compensation circuit implements preliminary action by delaying only the gate voltage application to the PMOS diode while allowing the drain voltage to transition immediately. This selective timing control reduces leakage current during the transition phase while maintaining fast body transition speed through the immediate drain voltage change
Solution Approach 2:
The compensation circuit dynamically controls the gate voltage timing based on the drain voltage state. By making the gate voltage application dynamic and conditional rather than static, the circuit achieves both reduced leakage current and maintained transition speed through adaptive voltage control
Data Source
AI summary
Described herein are circuits and methods for improving switch performance when overdriving the gate by adding a delay on a PMOS gate voltage such that it can turn on the PMOS during switch state transition to allow charge/discharge of the switch body voltage faster and it can turn off once the process is complete. For example, back-to-back diodes can be used to separate the PMOS gate and drain. This can reduce leakage current and can reduce or eliminate the potential for breakdown of the switch.


