RF Switch Capacitance Cancellation for Bulk CMOS Linearity

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Solution Overview

Problem

High-power RF switches in bulk CMOS technology face design challenges due to non-linear capacitances from drain-body and source-body diodes, which degrade linearity and harmonics performance, whereas SOI technology offers better linearity but still has residual non-linear capacitances that need reduction.

Innovation Solution

A method involving the use of voltage variable capacitors to cancel non-linear capacitances by combining their capacitance-voltage responses with those of N-channel field effect transistors (NFETs), specifically connecting a voltage variable capacitor across the drain and source terminals of NFETs to achieve a substantially constant capacitance region over a voltage range.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Ease of manufacture

If bulk CMOS process is used for high power RF switch design, then cost advantages and better scalability are achieved, but non-linear capacitances from drain-body and source-body diodes degrade linearity and harmonics performance

Engineering Contradiction:
Improvecost advantages and scalabilityVSAvoidlinearity and harmonics performance
Core Design Contradiction:
Ease of manufactureVSManufacturing precision

Solution Approach 1:

An auxiliary NFET transistor is introduced as an intermediary device to cancel the non-linear capacitances of the main switching NFET. The auxiliary transistor's capacitance characteristics are designed to be equal and opposite to those of the main transistor, thereby compensating for the harmful non-linear capacitances and improving linearity while maintaining bulk CMOS manufacturing advantages

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The invention modifies the electrical parameters of the auxiliary NFET transistor (such as width, length, and bias conditions) to achieve specific capacitance characteristics that match and cancel the non-linear capacitances of the main transistor. By adjusting these parameters, the combined capacitance response becomes substantially linear over the operating voltage range

Inventive Principle:
Principle #35Parameter changes

2Manufacturing precision

If SOI technology is used for high power switches, then better linearity is achieved due to minimal diode capacitances, but residual non-linear capacitances remain that need reduction

Engineering Contradiction:
ImprovelinearityVSAvoidresidual non-linear capacitances requiring additional cancellation
Core Design Contradiction:
Manufacturing precisionVSDevice complexity

Solution Approach 1:

Even in SOI technology where body-diode capacitances are minimized, residual non-linear capacitances remain. The auxiliary NFET transistor serves as a mediator to cancel these remaining non-linear effects, achieving even higher linearity by compensating for the residual capacitances that cannot be eliminated by the SOI process alone

Inventive Principle:
Principle #24Intermediary (Mediator)

3Loss of energy

If body, N-well and substrate are RF floated for improved insertion loss, then body-N-well and N-well-sub capacitances are suppressed, but drain-body and source-body capacitances remain causing design challenges

Engineering Contradiction:
Improveinsertion lossVSAvoiddrain-body and source-body capacitances
Core Design Contradiction:
Loss of energyVSManufacturing precision

Solution Approach 1:

When body, N-well, and substrate are RF floated to minimize body-related capacitances and improve insertion loss, the drain-body and source-body capacitances of the switching transistor remain problematic. The auxiliary NFET transistor acts as a mediator to cancel these remaining non-linear capacitances, allowing the RF floating technique to be effectively used without sacrificing linearity

Inventive Principle:
Principle #24Intermediary (Mediator)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach effectively reduces non-linear capacitances, improving the linearity and harmonics performance of high-power RF switches in both bulk CMOS and SOI processes, as demonstrated by simulation and measurement results showing improved output power and harmonic suppression.

Implementation Method 1

comparing a nonlinear NFET drain-source capacitance-voltage (C/V) response of the NFET with a voltage variable capacitor C/V response of a set of voltage variable capacitors

Methodology Applied
Scientific EffectCapacitance: Capacitance

Data Source

PatentUS12028060B2Switch capacitance cancellation circuit
Publication Date: 2024.07.02 MURATA MFG CO LTD
  • US12028060B2 patent drawing
  • US12028060B2 patent drawing
  • US12028060B2 patent drawing

AI summary

Methods and devices used to cancel non-linear capacitances in high power radio frequency (RF) switches manufactured in bulk complementary metal-oxide-semiconductor (CMOS) processes are disclosed. The methods and devices are also applicable to stacked switches and RF switches fabricated in silicon-on-insulator (SOI) technology.