RF Switch Gate Biasing for Low Oxide Stress and Fast Switching

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Solution Overview

Problem

Conventional RF switches face challenges in achieving low insertion loss, high isolation, and linearity, especially in high-power applications, due to parasitic capacitance and low-resistivity substrates in CMOS technology, making it difficult to produce high-isolation, high-linearity switches with wide bandwidth and fast switching times.

Innovation Solution

The use of a triple-well NMOS transistor with a voltage divider circuit, where the gate terminal is connected to a voltage divider output, allowing the transistor to operate with reduced oxide stress and maintaining power handling capability, enabling faster switching and reliable operation at higher voltages, while minimizing voltage stress on the gate oxide.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Ease of manufacture

If conventional CMOS transistors are used in RF switches, then manufacturing cost is reduced and integration compatibility is improved, but insertion loss increases and isolation performance deteriorates due to parasitic capacitance and low-resistivity substrates

Engineering Contradiction:
Improvemanufacturing costVSAvoidinsertion loss
Core Design Contradiction:
Ease of manufactureVSLoss of energy

Solution Approach 1:

The transistor structure is segmented into triple-well configuration with separate n-well and p-well regions, allowing independent control of substrate potential. This segmentation isolates the RF signal path from the substrate, reducing parasitic effects while maintaining CMOS compatibility for low-cost manufacturing.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The substrate resistance is changed by applying a negative bias to the n-well, dynamically adjusting the electrical parameters of the transistor. This parameter change reduces parasitic capacitance and improves isolation performance without requiring a different semiconductor process, maintaining cost-effectiveness.

Inventive Principle:
Principle #35Parameter changes

2Power

If higher voltages are applied to the gate terminal to improve power handling capability, then power handling capability is improved, but oxide stress increases leading to reduced reliability and shorter device lifetime

Engineering Contradiction:
Improvepower handling capabilityVSAvoidoxide stress
Core Design Contradiction:
PowerVSReliability

Solution Approach 1:

A voltage divider circuit is introduced as an intermediary between the control signal source and the gate terminal. This intermediary steps down the control voltage to a safe level that does not exceed the gate oxide breakdown voltage, while still providing sufficient gate drive for high-power operation through the transistor's intrinsic gain.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The voltage divider circuit provides beforehand protection by limiting the maximum gate voltage to prevent oxide breakdown before it occurs. This cushioning approach ensures that even if the control signal exceeds the safe level, the gate oxide is protected from damage, extending device lifetime.

Inventive Principle:
Principle #11Beforehand cushioning (Prior cushioning)

3Speed

If faster switching speeds are achieved by increasing gate voltage, then switching time is reduced, but oxide stress increases causing reliability degradation

Engineering Contradiction:
Improveswitching timeVSAvoidoxide stress
Core Design Contradiction:
SpeedVSReliability

Solution Approach 1:

The voltage divider circuit acts as an intermediary that enables fast switching by providing the necessary gate drive voltage while simultaneously limiting the voltage to safe levels. This allows the transistor to switch quickly without subjecting the gate oxide to damaging stress levels.

Inventive Principle:
Principle #24Intermediary (Mediator)

Data Source

PatentUS10097171B2Radio frequency switch with low oxide stress
Publication Date: 2018.10.09 SKYWORKS SOLUTIONS INC
  • US10097171B2 patent drawing
  • US10097171B2 patent drawing
  • US10097171B2 patent drawing

AI summary

A RF switch circuit includes a voltage divider circuit and a semiconductor device. The semiconductor device has an activated state and a deactivated state. The voltage divider circuit has an input terminal connected to a first line and an output terminal connected to a second line. The first line is connected to a power source. A gate terminal of the semiconductor device is connected to the second line. In the activated state, a source terminal and a drain terminal of the semiconductor device are each selectively connected to ground. In the deactivated state, the source terminal and the drain terminal of the semiconductor device are each selectively connected to the power source.