RF Switch FET Stack with Non-Uniform Gate Length for Voltage Balance
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Solution Overview
Problem
Radio-frequency (RF) switches face challenges in achieving high voltage handling capability and low ON-resistance (Ron) while maintaining linearity performance, particularly in applications where parasitic effects and voltage imbalance reduce the effective voltage handling and degrade Ron performance.
Innovation Solution
The implementation of a stack configuration with field-effect transistors (FETs) having a non-uniform distribution of parameters such as gate length, which tracks the distribution of voltage VDS across each FET, allowing for improved voltage handling and reduced Ron by optimizing the gate lengths and widths to achieve a scaled version of the voltage distribution and balance voltage division within the stack.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Strength
If FETs are arranged in a stack configuration to increase voltage handling capability, then the voltage handling capability is improved, but the ON-resistance increases
Solution Approach 1:
The patent applies local quality by assigning different gate lengths to different FETs within the stack based on their position. Specifically, FETs experiencing higher voltage stress (typically those closer to the input terminal) are given longer gate lengths to enhance their voltage handling capability, while FETs experiencing lower voltage stress are given shorter gate lengths to minimize their contribution to ON-resistance. This non-uniform distribution of gate lengths optimizes the overall performance of the stack by matching each FET's characteristics to its local electrical stress conditions.
2Strength
If the gate length is increased to improve voltage handling capability, then the voltage handling capability is improved, but the ON-resistance increases
Solution Approach 1:
The patent implements parameter changes by systematically varying the gate length parameter across different FETs in the stack. Instead of using a uniform gate length for all FETs, the gate length is adjusted as a continuous or discrete parameter based on the voltage distribution profile. This parameter optimization allows each FET to operate at an optimal point where the trade-off between voltage handling capability and ON-resistance is minimized for the specific voltage conditions it experiences.
3Strength
If a higher stack height is used to withstand higher power, then the voltage handling capability is improved, but the device complexity increases
Solution Approach 1:
The patent reduces device complexity by applying local quality principles to the gate length distribution. Rather than creating a uniformly complex structure, the design introduces complexity only where necessary - specifically in the gate length dimensions of FETs that require enhanced voltage handling. FETs in lower-stress positions maintain simpler, shorter gate structures. This targeted approach achieves the required voltage handling capability while minimizing the overall complexity of the stack configuration.
Data Source
AI summary
Radio-frequency (RF) switching devices having improved voltage handling capability. In some embodiments, a switching device can include a first terminal and a second terminal, and a plurality of switching elements connected in series to form a stack between the first terminal and the second terminal. The switching elements can have a non-uniform distribution of a parameter that results in the stack having a first voltage handling capacity that is greater than a second voltage handling capacity corresponding to a similar stack having a substantially uniform distribution of the parameter.