RF Transceiver Calibration Using Phase-Switched DC Offset Separation

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Solution Overview

Problem

In wireless communication transceivers, accurately distinguishing and canceling DC offsets from each stage of the circuit is challenging due to their indistinguishable output, making precise DC offset compensation difficult.

Innovation Solution

A transceiver system with a control circuit that switches phase sequences between the filter circuit and RF modulator during calibration periods, generating distinct RF signals to calculate and compensate DC offsets using a DC offset compensation circuit.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If traditional DC offset measurement methods are used, then the output signal is obtained, but the DC offsets from different circuit stages cannot be distinguished

Engineering Contradiction:
ImproveDC offset measurement precisionVSAvoidDifficulty of detecting DC offset source
Core Design Contradiction:
Measurement precisionVSDifficulty of detecting and measuring

Solution Approach 1:

The patent segments the DC offset measurement process into distinct calibration periods (first calibration period and second calibration period) with different phase sequences. During the first calibration period, the phase sequence is set to a first state to measure DC offset from the filter circuit, while during the second calibration period, the phase sequence is switched to a second state to measure DC offset from the RF modulator. This temporal segmentation allows differentiation of DC offset sources that would otherwise be indistinguishable in a single measurement.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent changes the phase sequence parameter of the RF signal during different calibration periods to enable differentiation of DC offset sources. By switching the phase sequence between first and second states, the system creates distinct measurement conditions that allow the control circuit to calculate and separate the DC offset contributions from different circuit stages (filter circuit vs. RF modulator).

Inventive Principle:
Principle #35Parameter changes

2Reliability

If DC offset compensation is performed without phase sequence switching, then the circuit architecture remains simple, but accurate DC offset compensation cannot be achieved

Engineering Contradiction:
ImproveDC offset compensation accuracyVSAvoidCircuit architecture complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent introduces dynamic phase sequence switching controlled by a control circuit to enable accurate DC offset compensation. The control circuit dynamically adjusts the phase sequence of the RF signal during different calibration periods, allowing the system to adaptively measure and compensate DC offsets from different circuit stages. This dynamic approach maintains reasonable circuit complexity while achieving high compensation accuracy through controlled temporal variations.

Inventive Principle:
Principle #15Dynamics

Data Source

PatentUS11990931B2Transceiver and calibration method
Publication Date: 2024.05.21 REALTEK SEMICON CORP
  • US11990931B2 patent drawing
  • US11990931B2 patent drawing
  • US11990931B2 patent drawing

AI summary

A transceiver includes a RF modulator, a filter circuit, a control circuit and a first DC offset compensation circuit. During a first calibration period, the control circuit controls the filter circuit to be connected to the RF modulator with a first phase sequence, such that the RF modulator outputs a first radio frequency signal. During a second calibration period, the control circuit controls the filter circuit to be connected to the RF modulator with a second phase sequence, such that the RF modulator outputs a second radio frequency signal. The second phase sequence is inverted with the first phase sequence. The control circuit is further configured to calculate a first DC offset generated from the filter circuit, and to control the first DC offset compensation circuit to compensate the first DC offset generated from the filter circuit.