Non-Uniform Transistor Finger Spacing for RF Voltage Distribution

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Solution Overview

Problem

Existing radio-frequency (RF) transistor stacks face performance degradation due to uneven voltage distribution across transistors, primarily caused by parasitic capacitance, which leads to reduced voltage handling capability and increased risk of transistor breakdown.

Innovation Solution

Implementing a field-effect transistor stack with non-uniform drain-to-source spacing and additional capacitance on selected transistors to promote more even voltage distribution across the stack, achieved through varying drain-to-source distances and gate-to-gate spacings, and adding interdigitated capacitors or metal traces to enhance capacitance.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If uniform drain-to-source spacing is used in transistor stacks, then manufacturing simplicity is maintained, but voltage distribution becomes uneven leading to performance degradation

Engineering Contradiction:
Improvevoltage distribution uniformityVSAvoidtransistor dimension variation
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent applies local quality by varying the drain-to-source spacing in specific transistors within the stack rather than uniformly across all transistors. Specifically, transistors closer to the input node have smaller drain-to-source spacing while those farther away have larger spacing, creating localized dimensional variations that compensate for parasitic capacitance effects and achieve more uniform voltage distribution throughout the stack.

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

The patent employs asymmetry by intentionally creating non-uniform drain-to-source spacing patterns in the transistor stack. Instead of symmetric uniform spacing, the design uses asymmetric spacing where adjacent transistors have different drain-to-source distances, with the spacing increasing progressively from transistors near the input node to those farther away, thereby balancing the voltage stress across the stack.

Inventive Principle:
Principle #4Asymmetry

2Reliability

If larger drain-to-source spacing is used, then parasitic capacitance is reduced, but voltage handling capability decreases

Engineering Contradiction:
Improveparasitic capacitance reductionVSAvoidvoltage handling capability
Core Design Contradiction:
ReliabilityVSStrength

Solution Approach 1:

The patent applies parameter changes by systematically varying the drain-to-source spacing parameter across different transistors in the stack. Each transistor is assigned a specific spacing value from a set of predetermined spacing options, creating a gradient of spacing parameters that optimizes the balance between parasitic capacitance reduction and voltage handling capability throughout the stack.

Inventive Principle:
Principle #35Parameter changes

3Reliability

If non-uniform transistor dimensions are implemented, then voltage distribution improves, but manufacturing precision requirements increase

Engineering Contradiction:
Improvevoltage distribution evennessVSAvoiddrain-to-source spacing control
Core Design Contradiction:
ReliabilityVSManufacturing precision

Solution Approach 1:

The patent applies segmentation by dividing the transistor stack into distinct groups or segments, where each segment uses a specific drain-to-source spacing value from a predetermined set. This segmentation approach allows the use of discrete, standardized spacing values that are easier to control during manufacturing, rather than requiring continuous precise adjustment of spacing for each transistor.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent employs parameter changes by utilizing a predetermined set of discrete spacing values (e.g., first spacing, second spacing, third spacing) that can be selectively applied to different transistors. This discretization of the spacing parameter simplifies manufacturing control while still achieving the desired non-uniform spacing pattern for improved voltage distribution.

Inventive Principle:
Principle #35Parameter changes

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach improves voltage distribution, increases the total voltage handling capability of the transistor stack, reduces RF losses, and enhances linearity performance by ensuring more even voltage distribution across all transistors, thereby extending the stack's operational limits.

Implementation Method 1

Existing radio-frequency (RF) transistor stacks face performance degradation due to uneven voltage distribution across transistors, primarily caused by parasitic capacitance

Methodology Applied
Scientific EffectParasitic capacitance: Parasitic Capacitance

Data Source

PatentUS10847543B2Transistor finger spacing and dimension variation in electronic devices
Publication Date: 2020.11.24 SKYWORKS SOLUTIONS INC
  • US10847543B2 patent drawing
  • US10847543B2 patent drawing
  • US10847543B2 patent drawing

AI summary

A radio-frequency device comprises a first transistor including a first set of fingers having a first finger-to-finger spacing in a width dimension of the first transistor, and a second transistor in a series connection with the first transistor, the second transistor including a second set of fingers having a second finger-to-finger spacing in the width dimension that is greater than the first finger-to-finger spacing.