RF Transistor Package Stability via Segmented Matching Network

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

Packaged RF transistors with internal matching networks face stability issues due to the creation of lower frequency feedback paths between adjacent cells, which reduces the overall device stability, and selecting impedance values for matching networks can limit topology and increase the risk of odd mode oscillations.

Innovation Solution

The use of a packaged RF transistor device with multiple parallel capacitors in the internal matching network, where wirebond connections are provided from capacitors to respective cells, and separate capacitors are used for each transistor cell to reduce low-frequency feedback and improve stability, along with electrically conductive connectors to minimize resonance modes.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Manufacturing precision

If an internal matching network is included within the package to provide impedance match at the input of the transistor, then the impedance matching performance is improved, but lower frequency feedback paths are created between adjacent cells which reduces device stability

Engineering Contradiction:
Improveimpedance matching performanceVSAvoiddevice stability
Core Design Contradiction:
Manufacturing precisionVSStability of the object's composition

Solution Approach 1:

The internal matching network is segmented into multiple independent matching circuits, with each circuit associated with a specific transistor cell. This segmentation prevents the creation of feedback paths between adjacent cells while maintaining impedance matching performance for each cell independently.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The matching network components are extracted and placed in separate packages rather than being integrated within a single package. This extraction eliminates the internal feedback paths that would otherwise exist between adjacent transistor cells in the same package.

Inventive Principle:
Principle #2Taking out (Extraction)

2Manufacturing precision

If impedance values for matching networks are selected to provide impedance match, then the matching performance is improved, but the topology selection is limited and the risk of odd mode oscillations increases

Engineering Contradiction:
Improveimpedance matching performanceVSAvoidrisk of odd mode oscillations
Core Design Contradiction:
Manufacturing precisionVSReliability

Solution Approach 1:

The matching network is divided into separate matching circuits for each transistor cell, allowing independent optimization of impedance values without constraining the overall topology. This segmentation eliminates the conditions that lead to odd mode oscillations while maintaining matching performance.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

Each matching circuit is designed with local quality optimized for its specific transistor cell, allowing different impedance values and configurations to be used for each cell based on its specific requirements, rather than being constrained by a uniform topology.

Inventive Principle:
Principle #3Local quality

Data Source

PatentEP2867991B1RF transistor packages with high frequency stabilization features
Publication Date: 2020.03.18 WOLFSPEED INC
  • EP2867991B1 patent drawingFigure 1~2B
  • EP2867991B1 patent drawingFigure 3
  • EP2867991B1 patent drawingFigure 4~5

AI summary

A packaged RF transistor device includes an RF transistor die including a plurality of RF transistor cells, an RF input lead coupled to the plurality of RF transistor cells, an RF output lead, and an output matching network coupled between the plurality of RF transistor cells and the RF output lead. The output matching network includes a plurality of capacitors having respective upper capacitor plates, wherein the upper capacitor plates of the capacitors are coupled to output terminals of respective ones of the RF transistor cells. The plurality of capacitors may be provided as a capacitor block that includes a common reference capacitor plate and a dielectric layer on the reference capacitor plate. The upper capacitor plates may be on the dielectric layer.