RFDAC Impedance Matching for Low-EVM Sleep-State Switching
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Solution Overview
Problem
Current radio frequency digital-to-analog converters (RFDACs) face challenges in maintaining consistent output impedance between active and sleep states, leading to impedance mismatch and signal-dependent charge injection, which degrades error vector magnitude (EVM) in high-order modulation transmissions.
Innovation Solution
The RFDAC design includes a configuration where the output impedance of DAC unit cells in both active and sleep states is dynamically matched using a passive network with zero static power consumption, and a sleep switch is used to eliminate common-mode charge injection by setting the unit cell impedance equal during both states.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Use of energy by moving object
If DAC unit cells are switched between active and sleep states to reduce power consumption, then power efficiency is improved, but output impedance mismatch occurs degrading EVM
Solution Approach 1:
The passive impedance matching network is pre-configured to provide the correct impedance transformation ratio before the DAC unit cells switch states. This preliminary configuration ensures that when unit cells transition between active and sleep states, the impedance mismatch is already compensated for, preventing EVM degradation while allowing power-saving sleep mode operation.
Solution Approach 2:
The patent transforms the impedance parameters by using a passive network with a specific transformation ratio (e.g., 2:1 or 4:1) to change the effective output impedance seen by the load. This parameter transformation ensures that the combined impedance of active and sleeping unit cells both match the desired output impedance, resolving the contradiction between power saving and signal quality.
2Manufacturing precision
If multiple DAC unit cells are used to achieve high resolution transmission, then manufacturing precision is improved, but device complexity increases
Solution Approach 1:
The high-resolution DAC is divided into multiple parallel unit cells, each handling a portion of the total signal. This segmentation allows the system to achieve high precision through the combined output of multiple simpler, identical cells rather than requiring one complex high-precision cell, thereby reducing individual cell complexity while maintaining overall transmission precision.
Solution Approach 2:
All DAC unit cells are designed with identical structures and characteristics, making them universal and interchangeable. This universality simplifies the design process and manufacturing, as the same standardized cell can be replicated multiple times to achieve the desired resolution without increasing the complexity of individual cells.
3Use of energy by moving object
If DAC unit cells operate in sleep state to minimize power consumption, then energy efficiency is improved, but signal-dependent charge injection occurs
Solution Approach 1:
The passive impedance matching network acts as an intermediary between the DAC unit cells and the load. This intermediary network isolates the load from the switching actions of the unit cells, preventing charge injection from directly affecting the output signal. The network's purely passive nature (using only resistors, capacitors, and inductors) ensures it does not generate additional charge injection while still providing impedance transformation.
Data Source
AI summary
Certain aspects of the present disclosure are directed to a radio frequency digital-to-analog converter (RFDAC). The RFDAC generally includes a plurality of digital-to-analog (DAC) unit cells. At least one DAC unit cell is capable of being configured in an active state or in a sleep state. For the at least one DAC unit cell, an output impedance of the DAC unit cell in the active state is equal to an output impedance of the DAC unit cell in the sleep state.