RF-DAC Timing Calibration for Glitch-Free Differential LO Switching
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Solution Overview
Problem
Existing RF-DACs experience glitches due to imperfections such as nonlinearities and data-dependent timing relationships between the Local Oscillator (LO) and data clocks, leading to degraded spectral purity and linearity, especially when the LO and data clock frequencies are in an integer ratio.
Innovation Solution
A calibration system that uses separate timing calibration for the positive and negative LO signals, employing delay circuits and switch circuits to adjust the timing of LO+ and LO- signals based on data signal delays, ensuring that data transitions occur when the LO is in a low state, thereby preventing glitches without complex circuitry.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Device complexity
If the data clock and LO clock frequencies are in an integer ratio with specific phase relationship, then the RF-DAC operation is simplified, but glitches are generated at every data transition which degrade linearity
Solution Approach 1:
The patent applies preliminary action by measuring the timing relationship between LO and data clocks before actual RF-DAC operation, storing the measured delay value, and using this pre-determined delay to adjust switch control signals during operation. This prevents glitches before they occur rather than correcting them afterward, maintaining linearity while allowing simplified integer-ratio clock operation.
2Manufacturing precision
If timing calibration is applied to correct LO and data clock phase relationship, then glitches are reduced, but additional calibration circuitry and processing are required
Solution Approach 1:
The patent implements self-service by having the RF-DAC system automatically measure its own timing relationship between LO and data clocks using its internal resources, store the measured value, and apply the correction autonomously during operation. This self-calibration approach reduces glitch generation without requiring external calibration equipment or complex additional circuitry.
Solution Approach 2:
The patent uses feedback by measuring the actual timing relationship between LO and data clocks, comparing it against ideal timing, storing the error/delay value, and using this feedback information to adjust the switch control signals. This closed-loop approach ensures glitches are minimized while keeping the calibration system relatively simple.
3Manufacturing precision
If separate timing calibration is performed for LO+ and LO- signals, then spectral purity is improved, but the calibration process becomes more complex
Solution Approach 1:
The patent applies segmentation by performing separate timing calibration measurements for LO+ and LO- signals independently, storing separate delay values for each, and applying the appropriate delay to each signal's switch control. This segmentation ensures spectral purity by addressing each differential signal's timing independently, while the automated measurement process keeps the overall complexity manageable.
Data Source
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AI summary
A calibration system comprises an actuator circuit comprising a first delay circuit that receives a plurality of data pulses and a second delay circuit that receives the pulses, wherein one of the first and second delay circuits delays the data pulses independently of the other of the first and second delay circuits; a data switch that receives an output of the actuator circuit including delay data signals of the data pulses from the first and second delay circuits and switches and outputs a plurality of local oscillator (LO) signals for output as a controlled LO signal according to control signals of the delay data signals and applied to the data switch. At least one calibration switch receives the output of the actuator circuit and the plurality of LO+ and LO- signals, and outputs a second controlled LO signal output to a sense circuit.