Radio Frequency Front End Masked Write Latency Reduction

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Solution Overview

Problem

The existing RFFE messaging protocols experience high latency due to the need for a read operation before performing a partial write operation, which violates the latency requirements of certain Radio Access Technologies.

Innovation Solution

The introduction of masked-write commands that allow slave devices to request permission from a master device to perform write operations without needing to read the current state of unchanged bits in slave device registers, using a mask field to identify bits to be changed and a data field to provide the new values, thereby reducing the need for read operations.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If a read operation is performed before a partial write operation in existing RFFE messaging protocols, then the current state of unchanged bits can be obtained, but the latency increases and violates latency requirements of certain Radio Access Technologies

Engineering Contradiction:
Improveaccuracy of register write operationVSAvoidlatency
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The master device maintains shadow registers that are pre-loaded with the current state of slave device registers. This preliminary action allows the master device to perform partial write operations using stored data without requiring real-time read operations, thereby reducing latency while maintaining write accuracy.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

Shadow registers act as an intermediary between the master device and slave device registers. The shadow registers store copies of slave register data, allowing the master device to perform write operations based on stored information rather than requiring direct read access to slave registers, thus eliminating read latency.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Reliability

If a read operation is performed before a partial write operation, then the correct register state can be used for writing, but the communication efficiency decreases

Engineering Contradiction:
Improvecorrectness of partial write operationVSAvoidcommunication efficiency
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The system pre-loads shadow registers with slave device register data, performing the data acquisition action in advance. This allows subsequent partial write operations to proceed without additional read operations, improving communication efficiency while ensuring correctness through the use of pre-cached data.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The master device creates and maintains copies of slave device register data in shadow registers. These copies enable efficient partial write operations without requiring access to the original slave registers, thereby improving communication efficiency while maintaining operational correctness.

Inventive Principle:
Principle #26Copying

3Speed

If the maximum clocking speed of 52 MHz is used in the RFFE protocol, then data transmission speed increases, but power consumption increases

Engineering Contradiction:
Improvedata transmission speedVSAvoidpower consumption
Core Design Contradiction:
SpeedVSUse of energy by moving object

Solution Approach 1:

By pre-loading shadow registers with slave device data, the system reduces the frequency and number of read operations required on the RFFE bus. This decreases the overall number of clock cycles needed for register operations, thereby reducing power consumption while maintaining high transmission speeds when data transfer is necessary.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The shadow registers enable continuous operation by providing locally available data for write operations, eliminating the need for repeated read-write cycles. This continuous availability of data reduces bus activity and clock usage, thereby reducing power consumption while maintaining operational speed.

Inventive Principle:
Principle #20Continuity of useful action

Data Source

PatentUS10019406B2Radio frequency front end devices with masked write
Publication Date: 2018.07.10 QUALCOMM INC
  • US10019406B2 patent drawing
  • US10019406B2 patent drawing
  • US10019406B2 patent drawing

AI summary

Methods and apparatuses are described that facilitate data communication between a first slave device and a second slave device across a serial bus interface. In one configuration, a master device receives, from a first slave device, a request to send a masked-write datagram to a second slave device via a bus, wherein the masked-write datagram is addressed to a radio frequency front end (RFFE) register of the second slave device. The masked-write datagram includes a mask field identifying at least one bit to be changed in the RFFE register and a data field providing a value of the at least one bit to be changed in the RFFE register. The master device detects whether the first slave device is authorized to send the masked-write datagram to the second slave device and permits the first slave device to send the masked-write datagram to the second slave device if authorization is detected.