Body Current Bypass Resistor for RFIC Isolation
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Solution Overview
Problem
Mobile RF transceivers using semiconductor on insulator (SOI) technology face challenges with reduced device isolation and increased RF loss due to the floating body effect, which generates parasitic transistors and out-of-band harmonics, limiting communication enhancements.
Innovation Solution
Incorporating a body current bypass resistor and a gate isolation resistor between the gate and body region of a switch field effect transistor (FET), along with a diode, to isolate and direct body current away from the gate, thereby improving breakdown voltage and harmonic performance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Loss of energy
If a reduced thickness BOX layer is used in SOI technology, then parasitic device capacitance is reduced, but artificial harmonics increase due to proximity of active device and substrate
Solution Approach 1:
The patent divides the body region into multiple segments by introducing body contact regions separated by isolation regions. This segmentation allows different portions of the body to be independently controlled and isolated, preventing the propagation of harmful effects while maintaining the benefits of reduced BOX thickness.
Solution Approach 2:
The patent introduces an intermediary body contact region with isolation regions between the active device and the substrate. This intermediary structure acts as a mediator that blocks the direct coupling path for artificial harmonics while allowing the reduced BOX thickness to maintain low parasitic capacitance.
2Reliability
If SOI substrates are used to reduce parasitic capacitance, then device performance improves, but device isolation decreases and RF loss increases
Solution Approach 1:
The body region is segmented into multiple isolated sections using isolation regions and body contact regions. This segmentation creates electrical isolation between different parts of the device, reducing RF loss and improving device isolation while maintaining the performance benefits of SOI technology.
Solution Approach 2:
The patent applies different electrical properties to different regions of the device. Isolation regions provide high impedance for RF signals to reduce loss, while body contact regions provide low impedance paths for DC bias. This local differentiation of electrical properties optimizes both performance and isolation.
3Ease of operation
If body current is allowed to flow freely in SOI devices, then device operation is simplified, but gate de-biasing occurs and harmonic performance deteriorates
Solution Approach 1:
The patent extracts the body current path from the gate by introducing separate body contact regions. This separation removes the harmful interaction between body current and gate bias, preventing gate de-biasing and harmonic generation while maintaining simplified device operation through the isolated body contacts.
Solution Approach 2:
Isolation regions act as intermediaries that block body current from reaching the gate. This intermediary structure prevents the direct coupling that causes gate de-biasing and harmonic distortion, while still allowing the device to operate with simplified biasing through the isolated body contact regions.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration enhances device isolation, reduces RF loss, and prevents gate de-biasing, leading to improved breakdown voltage and harmonic performance without consuming additional chip area.
Implementation Method 1
a body bypass resistor coupled between the gate and the body region
Implementation Method 2
a gate isolation resistor coupled between the gate and the body region
Implementation Method 3
a diode coupled between the body bypass resistor and the gate isolation resistor
Data Source
AI summary
A radio frequency integrated circuit (RFIC) is described. The RFIC includes a switch field effect transistor (FET), including a source region, a drain region, a body region, and a gate. The RFIC also includes a body bypass resistor coupled between the gate and the body region. The RFIC further includes a gate isolation resistor coupled between the gate and the body region. The RFIC also includes a diode coupled between the body bypass resistor and the gate isolation resistor.