RFIC Package Antenna Layout for Wireless Chiplet I/O Relief
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Solution Overview
Problem
The increasing complexity of 3D chiplet systems leads to congested I/O escape routes, deteriorating signal integrity and inducing switching noises, while traditional methods to improve signal integrity and power integrity, such as adding more through-silicon vias or expanding the package area, are limited by the constraints of die size and reticle size.
Innovation Solution
The integration of a radio frequency integrated circuit (RFIC) and a compact mm-wave antenna within a semiconductor package, which enables wireless communication between chiplets, packages, and motherboards, thereby reducing the need for physical routing and alleviating congestion in I/O escape routes.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If more through-silicon vias (TSVs) are added on a base die to improve signal integrity, then signal integrity improves, but device complexity and manufacturing cost increase
Solution Approach 1:
The patent replaces physical electrical routing (mechanical/electrical system) with wireless RF communication. Instead of routing control and sideband signals through congested TSVs and interconnects, the system uses an RF transceiver and antenna to transmit these signals wirelessly, eliminating the need for additional physical routing infrastructure while improving signal integrity.
Solution Approach 2:
The RF transceiver module serves multiple functions: it handles both data communication and control/sideband signal transmission. This multi-functionality allows the system to reduce the number of dedicated control signal routes while maintaining all necessary communication functions, thereby reducing overall routing complexity.
2Reliability
If the base die area is increased to accommodate more routing resources, then signal integrity improves, but manufacturing cost and reticle size constraints are violated
Solution Approach 1:
The patent substitutes wireless RF communication for physical signal routing, eliminating the need to expand base die area to accommodate additional routing resources. The RF transceiver and antenna provide a compact solution that delivers improved signal integrity without increasing the footprint of critical components.
3Reliability
If package area is expanded to reduce routing congestion, then signal integrity improves, but manufacturing cost increases
Solution Approach 1:
The patent replaces physical routing infrastructure with wireless communication, allowing the system to maintain signal integrity without expanding the package area. The RF-based control signal transmission eliminates the need for additional package real estate to accommodate congested routing layers and interconnect structures.
4Difficulty of detecting and measuring
If more pins are reserved for testing and debugging in 3D chiplets, then testing capability improves, but I/O escape congestion worsens and signal integrity deteriorates
Solution Approach 1:
The patent uses wireless RF communication to transmit test and debug signals, replacing the need for additional physical pins and routing resources. The RF transceiver enables testing capability improvement without adding to I/O escape congestion, as wireless transmission does not consume physical pin resources or routing capacity.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This solution enhances signal integrity and power integrity by reducing routing congestion, enabling clear line-of-sight wireless links, and minimizing the number of pins required for sideband and control signals, ultimately leading to improved data throughput and cost-effectiveness.
Implementation Method 1
an antenna formed in or on the molding compound and coupled to the RFIC
Data Source
AI summary
The present disclosure relates to a semiconductor package comprising a substrate, a radio frequency integrated circuit attached to the substrate, optionally at least one semiconductor die attached to the substrate and coupled to a radio frequency integrated circuit (RFIC) via one or more signal lines, a molding compound encapsulating the RFIC and the optional semiconductor die, and an antenna formed on the molding compound and coupled to the RFIC.


