RFIC Serial Control Circuit for Early Task Execution

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Solution Overview

Problem

Conventional integrated synthesizers and voltage controlled oscillators (VCOs) face performance reduction due to the need to wait for the entire 24-bit serial stream before determining which latch to program, leading to delayed computation of output frequency.

Innovation Solution

An RF System on Chip (RFSoC) that receives a data stream, extracts control bits first to determine the operation, and then processes the corresponding data bits independently, allowing tasks to be initiated before the entire data stream is received, thereby improving processing speed.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Speed

If the conventional integrated synthesizer waits for the entire 24-bit serial stream before determining which latch to program, then the control logic can accurately identify the operation type, but the execution speed is reduced due to delayed computation

Engineering Contradiction:
Improveexecution speedVSAvoidwaiting time for data stream
Core Design Contradiction:
SpeedVSLoss of time

Solution Approach 1:

The patent segments the 24-bit serial data stream into two distinct portions: control bits (first portion) and data bits (second portion). The control bits are processed immediately upon receipt to determine the operation type, while the data bits are processed separately after the operation is initiated. This segmentation allows the system to begin execution before receiving the complete data stream, thereby improving execution speed without sacrificing control accuracy.

Inventive Principle:
Principle #1Segmentation

2Productivity

If the RFSoC processes data bits independently after extracting control bits, then task initiation can occur before all data bits are received, but the data synchronization becomes more complex

Engineering Contradiction:
Improveprocessing throughputVSAvoiddata processing complexity
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The patent implements preliminary action by extracting and processing control bits from the serial data stream before the complete data stream is received. The control bits are used to determine the operation type and initiate the task early, while the remaining data bits are processed independently in subsequent steps. This preliminary processing of control information enables faster task initiation and improves overall productivity.

Inventive Principle:
Principle #10Preliminary action

Data Source

PatentUS7579972B2Risa controller for an RF integrated circuit (RFIC) having improved execution speed
Publication Date: 2009.08.25 HARRIS CORP
  • US7579972B2 patent drawing
  • US7579972B2 patent drawing
  • US7579972B2 patent drawing

AI summary

An RFIC controller configured for executing multiple tasks. A serial interface is included having a serial bus for receiving a data stream having control bits and data bits. One or more registers are coupled to the serial bus for storing the control bits and data bits as they are received. Control circuitry is also included. The data stream is formatted such that the control bits are received before the data bits, the control bits specifying an operation. The control circuitry is configured to examine the control bits as they are received to determine the operation specified by the control bits before the data bits are received. A task corresponding to the operation specified by the control bits is then initiated before the data bits are received.