RFIC Vertical Stacking T-Shaped Gate Electrode

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Solution Overview

Problem

Conventional radio frequency integrated circuits require enlarged silicon substrates to accommodate both RF devices and CMOS devices horizontally, leading to high manufacturing costs and non-compact designs.

Innovation Solution

A radio frequency integrated circuit with a silicon CMOS substrate featuring at least one CMOS device buried within and a thin film transistor with a T-shaped gate electrode, fabricated by forming CMOS devices, inter-level dielectric layers, patterned active regions, and conductive layers to create a compact vertical stack.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If radio frequency devices and CMOS devices are simultaneously built in a silicon substrate and displaced from each other in a horizontal direction, then both devices can be integrated, but the silicon substrate dimension must be enlarged

Engineering Contradiction:
Improvedevice integrationVSAvoidsubstrate dimension
Core Design Contradiction:
Adaptability or versatilityVSArea of stationary object

Solution Approach 1:

The patent transitions from horizontal displacement to vertical stacking by forming a thin film transistor structure on top of the CMOS device. The gate electrode extends vertically above the active region, creating a three-dimensional stacked configuration that integrates RF and CMOS devices in the vertical direction rather than requiring horizontal substrate expansion.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

2Adaptability or versatility

If the silicon substrate dimension is enlarged to accommodate both RF and CMOS devices, then device integration is achieved, but manufacturing cost increases

Engineering Contradiction:
Improvedevice integrationVSAvoidmanufacturing cost
Core Design Contradiction:
Adaptability or versatilityVSEase of manufacture

Solution Approach 1:

By stacking the thin film transistor vertically over the CMOS device, the patent reduces the horizontal footprint required for integration. This vertical integration approach allows both RF and CMOS devices to coexist on a smaller substrate area, thereby reducing manufacturing costs associated with larger wafers and lower production yields.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

3Adaptability or versatility

If a conventional horizontal layout is used for RF and CMOS devices, then device integration is possible, but the circuit area is not compact

Engineering Contradiction:
Improvedevice integrationVSAvoidcircuit area
Core Design Contradiction:
Adaptability or versatilityVSArea of moving object

Solution Approach 1:

The thin film transistor is nested vertically over the CMOS device, with the gate electrode positioned above the active region. This nested three-dimensional configuration allows the RF device to be embedded within the vertical space above the CMOS device, creating a compact integrated circuit structure that minimizes the overall circuit area.

Inventive Principle:
Principle #7Nested doll (Nesting)

Data Source

PatentUS11257845B2Radio frequency integrated circuit having relatively small circuit area and method of fabricating the same
Publication Date: 2022.02.22 NAT CHIAO TUNG UNIV
  • US11257845B2 patent drawing
  • US11257845B2 patent drawing
  • US11257845B2 patent drawing

AI summary

A radio frequency integrated circuit includes a silicon CMOS substrate with at least one CMOS device buried therein, and at least one thin film transistor formed on the silicon CMOS substrate and functioning as a radio frequency device. The thin film transistor includes a T-shaped gate electrode. A method for the fabricating a radio frequency integrated circuit is also disclosed.