RFID Bit Decoding Using Interval-Based Logic Level Counting
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Solution Overview
Problem
Decoding errors frequently occur in RFID systems due to incorrect determination of digital logic levels in data segments, caused by inappropriate setting of correlation peak thresholds.
Innovation Solution
A decoding apparatus and method that divides the bit cycle into two intervals, generating counts for each logic level within these intervals to determine the digital logic level of a bit, thereby avoiding decoding errors by comparing the number of samples at logical high in the first half to those in the second half of the bit cycle.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If the correlation method is used for decoding data segments in RFID systems, then the decoding process can be completed, but decoding errors frequently occur due to incorrect determination of digital logic levels when threshold settings are inappropriate
Solution Approach 1:
The patent divides each bit cycle into two distinct intervals (first interval and second interval), allowing separate counting of logical high levels in each interval. This segmentation enables the system to determine bit values by comparing counts between intervals rather than relying on absolute threshold values, thereby resolving the contradiction between decoding speed and accuracy.
2Ease of operation
If a fixed threshold is set for correlation peak values to determine digital logic levels, then the decoding process is simple and fast, but decoding errors occur when the threshold is set too low or too high
Solution Approach 1:
The patent changes the parameter from fixed threshold values to dynamic interval-based counting. Instead of comparing correlation peak values against predetermined thresholds, the system counts the number of logical high levels in each interval and determines bit values based on the relative difference between counts. This parameter change maintains operational simplicity while significantly improving measurement precision.
Data Source
AI summary
A decoding apparatus is disclosed. The decoding apparatus is applied to a data signal comprising a plurality of bits. A plurality of sampled data is generated by sampling the data signal. Each of the bits has a same cycle. The decoding apparatus comprises a calculating module and a determining module. When the calculating module sets a first interval and a second interval in the cycle of a specific bit, the calculating module generates a first count according to the sampled data in the first interval corresponding to a first logic level and generates a second count according to the sampled data in the second interval corresponding to a second logic level. The determining module determines a digital logic value of the specific bit.