RFID Chip Interdigitated Antenna Alignment

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Solution Overview

Problem

Current RFID tag manufacturing techniques are costly and inefficient, particularly for item-level tagging, due to the high expense of integrated circuits and the challenge of coupling small RFID chips to antennas with high reliability, leading to failure rates and increased testing costs.

Innovation Solution

The use of interdigitated antenna feeds with probabilistic placement methods, such as direct DC contact, magnetic/electric alignment, and capacitive coupling, allows for the efficient and reliable connection of microradio-sized RFID chips to antennas, eliminating the need for pick-and-place machines and reducing manufacturing costs.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Manufacturing precision

If traditional pick-and-place machine methods are used to mount RFID chips, then manufacturing precision can be achieved, but device complexity and manufacturing cost increase significantly

Engineering Contradiction:
Improvechip alignment precisionVSAvoidmanufacturing process complexity
Core Design Contradiction:
Manufacturing precisionVSDevice complexity

Solution Approach 1:

The RFID chip assembly performs self-alignment through its own structural features. The chip includes alignment marks and the substrate has corresponding registration features that automatically position the chip correctly during the mounting process without requiring external pick-and-place machinery or complex alignment procedures.

Inventive Principle:
Principle #25Self-service

Solution Approach 2:

The patent replaces the mechanical pick-and-place system with a self-aligning chemical/structural system. Instead of using mechanical grippers and positioning mechanisms, the chip and substrate use interlocking alignment features (such as alignment marks, registration pins, or complementary geometric shapes) to achieve precise positioning automatically.

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

2Reliability

If traditional testing methods are used for each chip, then reliability can be verified, but loss of time and manufacturing cost increase

Engineering Contradiction:
Improvechip functionality verificationVSAvoidtesting time
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The patent incorporates self-diagnostic features into the chip design before manufacturing. The chip includes built-in testing structures such as test circuits, alignment marks for verification, or configuration features that allow batch verification during or after assembly without requiring individual manual testing of each chip, thereby reducing time while maintaining reliability.

Inventive Principle:
Principle #10Preliminary action

3Ease of manufacture

If small microradio chips are used, then cost is reduced, but coupling reliability to antenna becomes more difficult to achieve

Engineering Contradiction:
Improvechip costVSAvoidchip-antenna coupling reliability
Core Design Contradiction:
Ease of manufactureVSReliability

Solution Approach 1:

The patent addresses the coupling challenge by transitioning from planar (2D) chip designs to three-dimensional (3D) configurations. The chip may be positioned at an angle, suspended over the antenna feed point, or configured with vertical interconnects that enhance electromagnetic coupling while maintaining the small footprint and low cost of the microradio chip.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Solution Approach 2:

The patent introduces intermediate coupling structures such as coupling loops, trace pathways, or electromagnetic bridges that facilitate reliable energy and signal transfer between the small chip and the antenna. These intermediaries compensate for the reduced size of the chip by providing enhanced coupling mechanisms that maintain reliability despite the smaller dimensions.

Inventive Principle:
Principle #24Intermediary (Mediator)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach significantly reduces the cost of RFID tags by enabling the production of millions of chips on a single wafer, achieving a high yield and eliminating the need for costly testing, while ensuring reliable operation and alignment of RFID chips with antennas.

Implementation Method 1

direct DC contact between the chip and the antenna, using a grid of interdigitated fingers at the feed region

Methodology Applied
Scientific EffectDirect DC contact: Conduction (electrical)

Implementation Method 2

the chip is approximately positioned but then centered and aligned across the gap using magnetic/electric techniques

Methodology Applied
Scientific EffectMagnetic alignment: Magnetic Field

Implementation Method 3

the chip is approximately positioned but then centered and aligned across the gap using magnetic/electric techniques

Methodology Applied
Scientific EffectElectric alignment: Electric Field

Implementation Method 4

field coupling is achieved (without DC contacts) when the chip contains a small antenna, and this assembly is then positioned at the appropriate region of the main antenna

Methodology Applied
Scientific EffectCapacitive coupling: Capacitance

Data Source

PatentUS8963718B2RFID chip and antenna
Publication Date: 2015.02.24 RADIOFIDO LLC
  • US8963718B2 patent drawing
  • US8963718B2 patent drawing
  • US8963718B2 patent drawing

AI summary

A Radio Frequency Identification (RFID) device antenna has a feed region of interdigitated fingers. The interdigitated fingers have parallel centerlines and are spaced one from another. A chip having opposing ends overlays opposing interdigitated fingers. A coupling is established between the chip and the antenna at the interdigitated fingers.