RFID Transponder Clock Synchronization During Active Load Modulation
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Solution Overview
Problem
Active load modulation (ALM) systems in RFID transponders face challenges in maintaining synchronization between the reader carrier clock and the ALM carrier clock due to phase drift, which can lead to signal oscillations and reduced signal amplitude, requiring complex damping systems to manage oscillations and resynchronization.
Innovation Solution
A method using a digital phase locked loop (DPLL) to generate an ALM carrier clock synchronized with the reader's carrier clock, where the DPLL operates in lock mode outside data frames and in hold mode during transmission, with phase adjustments made within the data frame to maintain phase difference within a target range, potentially eliminating the need for complex damping systems.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Duration of action of moving object
If a PLL is put in hold mode during transponder reply frame to enable ALM transmission, then ALM carrier bursts can be transmitted, but frequency difference between ALM carrier clock and reader carrier clock causes phase drift
Solution Approach 1:
The patent implements periodic phase corrections during gap periods between ALM carrier bursts. The PLL is temporarily switched to lock mode during these gaps to realign the ALM carrier clock with the reader carrier clock, then switched back to hold mode for ALM transmission. This periodic switching between lock and hold modes during gap periods maintains synchronization while allowing continuous ALM transmission capability.
2Reliability
If PLL feedback is closed continuously to maintain synchronization, then phase drift is corrected, but ALM transmission is disrupted by signal oscillations after each carrier burst
Solution Approach 1:
The patent utilizes the gap periods between ALM carrier bursts to periodically close the PLL feedback loop for phase correction. During these gap periods when no ALM transmission occurs, the PLL is switched to lock mode to correct phase drift, then switched to hold mode to resume ALM transmission. This periodic operation allows synchronization maintenance without disrupting ALM transmission during the data-carrying carrier burst periods.
3Object-affected harmful factors
If damping systems are added to manage signal oscillations, then oscillation control is improved, but device complexity increases
Solution Approach 1:
The patent uses the existing PLL feedback mechanism to address signal oscillations. By temporarily closing the feedback loop during gap periods, the system allows the PLL to detect and correct phase drift caused by oscillations from previous carrier bursts. This approach uses the existing feedback infrastructure rather than adding separate damping systems, maintaining oscillation control while avoiding increased device complexity.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach simplifies the synchronization process by allowing phase corrections within each data frame, reducing signal oscillations and maintaining synchronization without the need for extensive damping, thus enhancing communication efficiency and reducing system complexity.
Implementation Method 1
a frequency source in the transponder is used to generate ALM carrier clock. The frequency source is occasionally corrected during the gaps in the frame when actual carrier bursts are not emitted. During these gaps only the reader carrier signal is present (on the transponder antenna) so the reference frequency is available to re-adjust the ALM carrier frequency source.
Implementation Method 2
a phase locked loop (PLL) with a voltage controlled oscillator (VCO), which generates a clock with a frequency equal to a reader carrier frequency, is used to generate the ALM clock.
Implementation Method 3
The free-running frequency of the VCO is defined by a charge which is stored in a loop filter. A frequency difference between the ALM carrier clock generated by the VCO and reader carrier clock results in a phase drift of the ALM carrier clock compared to the reader carrier clock.
Data Source
AI summary
A transponder communicates with a reader using active load modulation. The transponder includes a digital phase locked loop (DPLL), which, in operation, generates an active load modulation (ALM) carrier clock synchronized to carrier clock of the reader. Between transmission of data frames, the DPLL is placed in a lock mode of operation in which a feedback loop of the DPLL is closed. Within a transmitted data frame having a duration, the DPLL is placed, for the duration of the transmitted data frame, in a hold mode of operation in which the feedback loop is opened. A phase of the ALM carrier clock is adjusted at least once during the duration of the transmitted data frame.