RFID Demodulator FIR Filtering for Smaller, Lower-Power Tags
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Solution Overview
Problem
Passive RFID tags face limitations in sensitivity for downlink communication and transmit strength for uplink communication due to high quality-factor antennae, which reduces reading distance and increases manufacturing costs due to large component sizes.
Innovation Solution
A demodulator with a finite impulse response (FIR) filter arrangement replaces traditional continuous-time low-pass filters and envelope detectors, allowing for flexible equalization of RF signals and reducing component size and power consumption, enabling improved sensitivity and transmit strength.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If traditional continuous-time low-pass filters and envelope detectors are used in the demodulator, then the circuit can process RF signals, but the component size becomes large and power consumption increases
Solution Approach 1:
The patent replaces traditional continuous-time low-pass filters and envelope detectors with a discrete-time FIR filter implemented using switched capacitor circuits. This substitution transitions from continuous-time analog processing to discrete-time digital processing, enabling miniaturization and reduced power consumption while maintaining signal processing functionality.
Solution Approach 2:
The patent changes the operating parameters of the filter by using switched capacitor circuits that can be controlled by clock signals. The filter coefficients and cutoff frequencies are adjusted through digital control mechanisms, allowing flexible adaptation to different RF signal conditions without requiring large analog components.
2Reliability
If traditional continuous-time low-pass filters and envelope detectors are used in the demodulator, then the circuit can process RF signals, but power consumption increases
Solution Approach 1:
The patent replaces traditional continuous-time low-pass filters and envelope detectors with a discrete-time FIR filter implemented using switched capacitor circuits. This substitution transitions from continuous-time analog processing to discrete-time digital processing, enabling miniaturization and reduced power consumption while maintaining signal processing functionality.
Solution Approach 2:
The switched capacitor FIR filter operates by periodically switching capacitors during discrete time intervals synchronized with the clock signal. This periodic operation allows the filter to achieve continuous-time filtering performance with discrete-time components, significantly reducing power consumption compared to continuous analog filtering.
3Reliability
If high quality-factor antennae are used, then the antenna performance is improved, but the component size increases and manufacturing costs increase
Solution Approach 1:
The patent replaces traditional continuous-time low-pass filters and envelope detectors with a discrete-time FIR filter implemented using switched capacitor circuits. This substitution transitions from continuous-time analog processing to discrete-time digital processing, enabling miniaturization and reduced power consumption while maintaining signal processing functionality.
4Reliability
If high quality-factor antennae are used, then the antenna performance is improved, but manufacturing costs increase
Solution Approach 1:
The patent replaces traditional continuous-time low-pass filters and envelope detectors with a discrete-time FIR filter implemented using switched capacitor circuits. This substitution transitions from continuous-time analog processing to discrete-time digital processing, enabling miniaturization and reduced power consumption while maintaining signal processing functionality.
Data Source
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AI summary
The invention relates to an RFID circuit and to a demodulator (100) for an RFID circuit, the demodulator comprising: - an input (102) and at least one output (104, 106), - a clock extractor (110) connected to the input (102), - a comparator (130) connected to the at least one output (104), - a finite impulse response FIR filter arrangement (145) connected to the input (102) and connected to the comparator (130).