RFID Tag Die Shielding Layer for Bump Placement Control
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Solution Overview
Problem
In the manufacturing of RFID tag circuit die, unwanted bump material forms during the deposition process, causing electrical shorts with the antenna assembly, leading to marginally operable or inoperable RFID tags due to impedance deviations from designed values.
Innovation Solution
A shielding layer, such as polyimide, is deposited over the wafer to prevent unwanted bump material formation by shielding the test pads from the plating solution, and then patterned to expose only the bump pads for proper bump deposition, thereby eliminating unwanted contacts and reducing parasitic capacitance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If bump material is deposited over the entire wafer surface during the plating process, then all metallic regions including test pads receive bump material, but unwanted bump material forms on test pads and other non-I/O metallic regions causing electrical shorts and impedance deviations
Solution Approach 1:
The wafer surface is segmented into exposed regions (I/O pads) and covered regions (test pads, non-I/O metallic regions) using a photolithography mask. The mask physically divides the deposition area, allowing bump material to be deposited only on designated I/O pads while preventing deposition on test pads and other non-I/O regions, thus achieving precise bump placement without unwanted contacts
Solution Approach 2:
A photolithography mask serves as an intermediary element between the bump material and the wafer surface. This mask selectively blocks the bump material from reaching test pads and non-I/O metallic regions while allowing it to reach I/O pads, thereby controlling bump placement accuracy and preventing unwanted bump formation that would cause electrical shorts
2Quantity of substance
If bump material is deposited on test pads and non-I/O metallic regions, then complete surface coverage is achieved, but electrical shorts occur with the antenna assembly and RFID tags become marginally operable or inoperable
Solution Approach 1:
The deposition area is segmented using a photolithography mask that distinguishes between I/O pads (where bumps are needed) and test pads/non-I/O regions (where bumps should not form). This segmentation ensures bump material is deposited only where required, preventing electrical shorts with the antenna assembly and maintaining RFID tag operational reliability
Solution Approach 2:
The photolithography mask, which initially serves to block bump material from test pads, inadvertently provides a dual benefit: it prevents unwanted bump formation (avoiding electrical shorts) and simultaneously ensures proper bump formation on I/O pads. The harmful effect of complete surface coverage is converted into the beneficial effect of selective, precise bump placement
3Manufacturing precision
If impedance values deviate from designed values due to unwanted bump contacts, then RFID tag performance deteriorates, but the root cause is difficult to detect and measure
Solution Approach 1:
The photolithography mask is applied before bump material deposition to pre-establish a controlled deposition pattern. This preliminary action ensures that bumps form only on I/O pads with correct geometry and positioning, preventing impedance deviations before they occur. By controlling bump placement in advance, the need for post-deposition impedance measurement and adjustment is reduced
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This solution improves RFID tag yield by eliminating unwanted contacts, reduces thermal stress during packaging, enhances adhesion between the antenna and die, and minimizes parasitic capacitance, resulting in improved packaging yield and operational reliability.
Implementation Method 1
A shielding layer, such as polyimide, is deposited over the wafer to prevent unwanted bump material formation by shielding the test pads from the plating solution
Implementation Method 2
the bumps that are later formed on the I/O pads on an RFID tag circuit die are typically connected to an antenna assembly after the die has been separated from the wafer
Data Source
AI summary
The present description describes back-end processes, the use of which may help overcome these problems and limitations of the prior art. In one optional embodiment, the back-end process includes depositing a layer over a wafer. The wafer contains a plurality of circuit die for respective RFID tags. The wafer also has exposed metallic regions. The exposed metallic regions include first regions having electrical contacts to the plurality of circuit die and second regions having electrical contacts to the wafer's electrical test sites. The method includes forming exposed first regions and unexposed second regions by etching the layer over the first regions but not over the second regions. The method also includes plating metallic bumps on the exposed first regions.