Bidirectional RFID Serial Interface for High-Speed FRAM Data Transfer
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Solution Overview
Problem
Current RFID systems using EEPROM memory are inefficient for high-throughput applications due to slow data transfer rates, and existing protocols are not optimized for faster memory technologies like FRAM, which limits their performance in environments such as factories and toll collection.
Innovation Solution
A modified serial interface for RFID systems that utilizes a bidirectional data transfer method with both edges of a clock signal, reducing the number of clock cycles required to transfer data and minimizing power consumption, along with a memory pointer mechanism for efficient data storage and retrieval, enabling faster data throughput and optimized memory management.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If EEPROM memory is used in passive RFID tags, then compatibility with existing protocols is maintained, but data transfer speed is slow and throughput is limited
Solution Approach 1:
The patent changes the memory technology parameter from EEPROM to FRAM (Ferroelectric Random Access Memory), which inherently provides faster read/write speeds and higher endurance. This parameter change enables the RFID tag to achieve data transfer speeds exceeding 1 Mbps, directly resolving the contradiction between maintaining protocol compatibility and achieving high-speed data transfer.
Solution Approach 2:
The patent implements a dynamic data transfer protocol that adapts the communication mode between reader and tag based on operational requirements. The system can switch between full-duplex mode for high-speed reads and half-duplex mode for writes, optimizing the throughput performance dynamically rather than being fixed by the memory type.
2Productivity
If existing EEPROM-based protocols are used, then backward compatibility is maintained, but they are not optimized for faster memory technologies like FRAM
Solution Approach 1:
The patent implements a dynamic data transfer protocol that adapts the communication mode between reader and tag based on operational requirements. The system can switch between full-duplex mode for high-speed reads and half-duplex mode for writes, optimizing the throughput performance dynamically rather than being fixed by the memory type.
Solution Approach 2:
The patent segments the data transfer process into distinct phases: initialization phase, data transfer phase, and acknowledgment phase. During the data transfer phase, the system utilizes FRAM's fast access capability by implementing direct memory access without requiring intermediate buffer operations, thereby segmenting the protocol to maximize throughput for FRAM-specific operations.
3Ease of manufacture
If standard block write methods are used, then protocol compatibility is maintained, but memory access efficiency is reduced
Solution Approach 1:
The patent implements preliminary action by establishing a dedicated fast memory access path during the initialization phase, where the reader and tag negotiate optimal communication parameters and establish direct access routes to FRAM memory. This preliminary setup eliminates the need for time-consuming intermediate buffer operations during subsequent data transfers, significantly reducing access time while maintaining protocol compatibility.
Solution Approach 2:
The patent extracts the time-consuming buffer management operations from the standard block write protocol by implementing direct FRAM memory access. The system takes out the intermediate buffering step that is necessary for EEPROM operations and replaces it with direct memory access capabilities that leverage FRAM's fast random access特性, thereby improving memory access efficiency and reducing access time.
Data Source
AI summary
A serial interface includes a select node, a clock node, a first bidirectional data port, a second bidirectional data port, and shift register circuitry coupled to both data ports such that a leading edge and a falling edge of a clock signal associated with the clock node are used to shift or transfer data.