RFID Tag Inductive Loop Impedance Matching
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Solution Overview
Problem
Current RFID tags face limitations in efficiently absorbing electrical energy due to mismatched impedance between the semiconductor chip and the electromagnetic signals, which affects their performance in various applications.
Innovation Solution
The method involves forming an inductive loop using two wires connected to a semiconductor chip, with the wires positioned in a vertical optical fiber-making process to create an encased string of RFID tags, where the spacing and connection of the wires form a dipole antenna and inductive loop, allowing for improved energy absorption by matching the impedance of the chip.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If traditional RFID tag structures are used, then manufacturing is simpler, but impedance matching between chip and electromagnetic signals is poor
Solution Approach 1:
The patent segments the wire structure into distinct functional portions: a first wire with first and second portions, and a second wire with first and second portions. The spaced apart segments create inductive loops while connected segments form dipole antenna elements. This segmentation enables precise control over impedance characteristics by optimizing each segment's geometry and positioning, directly resolving the impedance matching problem while maintaining manageable complexity through modular design.
2Use of energy by moving object
If wire spacing is increased to form inductive loop, then electromagnetic signal absorption improves, but antenna size increases
Solution Approach 1:
The patent applies local quality by creating spaced apart segments specifically adjacent to the chip where inductive loops are most effective for energy coupling. The spacing is optimized locally at the chip interface rather than uniformly throughout the entire wire structure. This allows strong electromagnetic coupling and energy absorption at the critical chip-wire interface while the overall antenna length can be controlled by adjusting the connected segments, thus resolving the contradiction between energy absorption and size.
3Manufacturing precision
If manual wire configuration is used, then positioning precision is harder to achieve, but manufacturing flexibility is maintained
Solution Approach 1:
The patent embeds the wire structure within a casing that is formed during the optical fiber drawing process. The wires are positioned and configured within the preform, then the entire structure is drawn down together with the casing material forming around it. This nesting approach integrates wire configuration precision into the manufacturing process itself rather than requiring post-processing adjustment, achieving high positioning precision while maintaining ease of manufacture through a unified drawing process.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration enhances the absorption of electromagnetic signals by the semiconductor chip, leading to improved performance and efficiency in RFID tag applications, such as inventory control and loss prevention.
Implementation Method 1
moving the RFID assembly through a casing material at or above a glass transition temperature of the casing material to encase the RFID assembly
Implementation Method 2
the spacing and connection of the wires form a dipole antenna and inductive loop, allowing for improved energy absorption by matching the impedance of the chip
Data Source
AI summary
Aspects of the present disclosure includes a method of manufacturing a radio frequency identification (RFID) tag, including connecting a first wire and a second wire across a chip, maintaining the spaced apart distance between the first wire and the second wire adjacent to each side of the chip to define a spaced apart segment of the first wire and the second wire that forms part of an inductive loop, connecting the first wire and the second wire at each side of the chip distal from and adjacent to the spaced apart segment of the first wire and the second wire to close the inductive loop, define connected wire segments, and to form an RFID assembly, and moving the RFID assembly through a casing material at or above a glass transition temperature of the casing material to encase the RFID assembly.