Multi-Stage RFID Rectifier Biasing with Shared Current Paths
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Solution Overview
Problem
RFID systems face inefficiencies in power management and rectification processes, particularly in multi-stage rectifiers, due to the need for multiple bias currents and complex circuitry, which increases IC area and power consumption.
Innovation Solution
The implementation of a central biasing scheme that reuses bias currents to simultaneously bias multiple rectifying elements in a multi-stage rectifier, reducing the number of required bias currents and simplifying the circuitry by using resistive ladders to create bias current paths that can voltage-bias multiple stages with fewer bias currents.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If multiple bias currents are used to bias each rectifying element in multi-stage rectifiers, then the rectification performance is improved, but the circuit complexity and IC area increase
Solution Approach 1:
The patent combines multiple bias current paths into a single shared bias current path that serves multiple rectifier stages. The bias current is injected at a common node and distributed to multiple rectifying elements through resistive dividers, eliminating the need for separate bias current generators for each stage while maintaining proper biasing for all rectifiers.
Solution Approach 2:
The single bias current path serves multiple functions by simultaneously biasing multiple rectifier stages. The bias current is reused across different rectifying elements, and resistive ladders provide both biasing and voltage division functions, making the circuit more versatile and efficient.
2Reliability
If multiple bias currents are used to bias each rectifying element in multi-stage rectifiers, then the rectification performance is improved, but the power consumption increases
Solution Approach 1:
The patent recovers and reuses the bias current across multiple rectifier stages instead of dissipating it in separate current paths. The single bias current source generates one current that is circulated and reused to bias multiple stages, reducing the total power consumption compared to having multiple independent bias current sources.
3Reliability
If multiple bias currents are used to bias each rectifying element in multi-stage rectifiers, then the rectification performance is improved, but the IC area increases
Solution Approach 1:
The patent merges multiple bias current generation circuits into a single compact bias current path with resistive dividers. This consolidation significantly reduces the IC area required for biasing circuitry while still providing proper biasing to all rectifier stages through the shared current path and resistive network.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enhances the efficiency of the rectification process by reducing power consumption and IC area requirements, improving the overall performance of RFID systems by allowing for more efficient power delivery and reduced complexity in the rectifier design.
Implementation Method 1
A rectifier that has multiple rectifier stages coupled together serially includes a bias current path coupled to each of the rectifier stages. The bias current path is configured to simultaneously bias rectifying elements in each of the rectifier stages
Data Source
AI summary
Embodiments are directed to rectifiers using a single bias current or bias current path to bias multiple rectifying elements. A rectifier that has multiple rectifier stages coupled together serially includes a bias current path coupled to each of the rectifier stages. The bias current path is configured to simultaneously bias rectifying elements in each of the rectifier stages by using a bias current to bias a first rectifying element and reusing the bias current to bias other rectifying elements.