Rhombus Logic Chip Terminal Arrangement for Semiconductor Package
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Solution Overview
Problem
Current semiconductor packages face challenges in achieving high-speed data transmission between logic and memory chips, leading to larger package sizes and reduced performance.
Innovation Solution
A semiconductor package design featuring a rhombus-shaped logic chip with strategically arranged system address and data terminals, connected via address and data lines to memory packages on a substrate, with angular orientation of the logic chip relative to memory packages to minimize interconnection lengths and enhance data processing speed.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If conventional semiconductor package design is used, then package size is reduced, but data transmission speed between logic chip and memory chip decreases
Solution Approach 1:
The logic chip is arranged at an angular orientation (e.g., 45 degrees) relative to the memory packages, transitioning from conventional parallel alignment to diagonal positioning. This angular arrangement optimizes the spatial distribution of interconnection lines, reducing their lengths and improving data transmission speed while maintaining a compact package footprint.
Solution Approach 2:
Terminals on the logic chip are strategically positioned in specific regions (e.g., corners and edges) to minimize interconnection line lengths to adjacent memory packages. This localized terminal arrangement optimizes the quality of connections in critical areas, enabling faster data transmission without increasing overall package size.
2Productivity
If interconnection line length is reduced, then data processing speed increases, but terminal arrangement complexity increases
Solution Approach 1:
The logic chip employs an asymmetric terminal arrangement where system address terminals, system data terminals, and memory data terminals are positioned at different locations (corners and edges) rather than uniform distribution. This asymmetric positioning optimizes connection paths to memory packages, reducing line lengths and improving processing speed despite the increased complexity in terminal placement.
Data Source
AI summary
A semiconductor package includes: a plurality of memory packages which are arranged on a substrate; and a logic chip, which has a rhombus shape including first through fourth corners and first through fourth sides connecting the first through fourth corners, is arranged adjacent to the plurality of memory packages, and includes a plurality of terminals that are electrically connected to the plurality of memory packages, as seen on a plan view of the semiconductor package, wherein the plurality of terminals include system address terminals which are adjacent to the first corner of the logic chip and first and second system data terminals which are respectively arranged on the first and second sides contacting the first corner. Another semiconductor package and a method of fabrication are disclosed.