Ribbon FET 2DEG Channel with Ferroelectric Memory Switching

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Solution Overview

Problem

Transistors face challenges in reducing power dissipation due to high threshold voltage and leakage current, which are not effectively addressed by conventional ferroelectric field-effect transistors (FEFETs).

Innovation Solution

A ribbon field-effect transistor (FET) is designed with a channel formed at the interface between barium stannate (BSO) and lanthanum scandium oxide (LSO) perovskite layers, utilizing a two-dimensional electron gas (2DEG) or hole gas (2DHG) for low-threshold switching and memory applications, leveraging a ferroelectric dielectric layer for polarization-based conductivity control.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Duration of action of stationary object

If a ferroelectric field-effect transistor (FEFET) is used to maintain state based on ferroelectric layer, then non-volatile memory capability is improved, but threshold voltage becomes relatively high and leakage current increases

Engineering Contradiction:

Improvememory capabilityVSAvoidleakage current

Core Design Contradiction:

Duration of action of stationary objectVSLoss of energy

Solution Approach 1:

The patent changes the material parameter of the channel from conventional semiconductors to a two-dimensional electron gas (2DEG) formed at the interface between barium stannate (BSO) and lanthanum scandium oxide (LSO) perovskite layers. This material parameter change enables low-threshold voltage operation while maintaining the non-volatile memory capability provided by the ferroelectric dielectric layer, thereby resolving the contradiction between memory capability and leakage current.

Inventive Principle:

Principle #35Parameter changes

2Loss of energy

If conventional transistor design is used to reduce power dissipation, then leakage current reduction is attempted, but threshold voltage remains high when using ferroelectric layers

Engineering Contradiction:

Improvepower dissipationVSAvoidthreshold voltage control

Core Design Contradiction:

Loss of energyVSReliability

Solution Approach 1:

The patent employs a composite structure combining barium stannate (BSO) and lanthanum scandium oxide (LSO) perovskite layers to form the channel, with a ferroelectric dielectric layer (such as barium titanate or lead zinc niobate) integrated adjacent to the channel. This composite material system enables simultaneous achievement of low threshold voltage and effective power dissipation reduction, resolving the contradiction between power dissipation and threshold voltage control.

Inventive Principle:

Principle #40Composite materials

3Productivity

If density of transistors is increased to improve integration, then productivity is improved, but power dissipation per transistor must be reduced

Engineering Contradiction:

Improvetransistor densityVSAvoidpower dissipation

Core Design Contradiction:

ProductivityVSLoss of energy

Solution Approach 1:

The patent utilizes a material parameter change to the 2DEG channel formed at the BSO-LSO perovskite interface, which provides inherently low resistance and low threshold voltage operation. This enables high transistor density integration while maintaining low power dissipation per transistor, as the 2DEG channel efficiently conducts current even at small device dimensions, thus resolving the contradiction between transistor density and power dissipation.

Inventive Principle:

Principle #35Parameter changes

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The transistor achieves reduced power dissipation through low-threshold voltage switching and enhanced memory capabilities by utilizing the ferroelectric material's polarization state for conductivity modulation.

Implementation Method 1

utilizing a two-dimensional electron gas (2DEG) or hole gas (2DHG) for low-threshold switching

Methodology Applied

Scientific EffectTwo-dimensional electron gas (2DEG):

Implementation Method 2

utilizing a two-dimensional electron gas (2DEG) or hole gas (2DHG) for low-threshold switching

Methodology Applied

Scientific EffectTwo-dimensional hole gas (2DHG):

Implementation Method 3

leveraging a ferroelectric dielectric layer for polarization-based conductivity control

Methodology Applied

Scientific EffectFerroelectric polarization:

Implementation Method 4

leveraging a ferroelectric dielectric layer for polarization-based conductivity control

Methodology Applied

Scientific EffectPolarization: Polarisation

Data Source

PatentUS20260006820A1Technologies for a ribbon field effect transistor with two-dimensional electron or hole gas channels

Publication Date: 2026.01.01 INTEL CORP

AI summary

Technologies for a field effect transistor (FET) with a two-dimensional electron gas (2DEG) or a two-dimensional hole gas (2DHG) are disclosed. In an illustrative embodiment, channel fins of a ribbon FET include two perovskite layers. At an interface between the perovskite layers, a 2DEG or a 2DHG is formed. The 2DEG or 2DHG can act as a channel for an NMOS or PMOS transistor, respectively. In some embodiments, an NMOS transistor with a 2DEG channel can be combined with a PMOS transistor with a 2DHG channel can be combined in a CMOS system. Additionally, methods of manufacturing such transistors are disclosed.