RID-Based Memory Addressing for Out-of-Order DIMM Transfers

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Solution Overview

Problem

Existing memory devices struggle with inefficient data transfer and command execution order, particularly in dual in-line memory modules (DIMMs), leading to delays and inefficiencies in responding to read commands.

Innovation Solution

Implementing a read identification (RID) number system that includes a first portion to identify data location and a second portion to uniquely identify commands, allowing DIMMs to respond to commands out of order and facilitate efficient data transfer between memory devices.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If memory devices process commands in sequential order, then command execution is simple to manage, but data transfer efficiency deteriorates due to delays and waiting times

Engineering Contradiction:
Improvedata transfer efficiencyVSAvoidcommand execution management
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The command structure is segmented into distinct fields including a read identification (RID) number that contains both address information and command identification. This segmentation allows the memory device to parse and process different parts of the command independently, enabling out-of-order execution while maintaining proper command tracking and association between commands and their corresponding data locations.

Inventive Principle:
Principle #1Segmentation

2Speed

If memory devices use traditional addressing methods, then addressing is straightforward, but response time deteriorates due to mandatory sequential command processing

Engineering Contradiction:
Improveresponse timeVSAvoidaddressing method
Core Design Contradiction:
SpeedVSEase of operation

Solution Approach 1:

The RID number is prepared in advance to contain both the address information and a unique command identifier. This preliminary encoding of multiple pieces of information into a single field allows the memory device to pre-process and queue multiple commands simultaneously, then execute them out of order based on completion status rather than arrival status, significantly reducing response time without complicating the addressing interface.

Inventive Principle:
Principle #10Preliminary action

Data Source

PatentUS12373144B2Addressing in memory with a read identification (rid) number
Publication Date: 2025.07.29 MICRON TECHNOLOGY INC
  • US12373144B2 patent drawing
  • US12373144B2 patent drawing
  • US12373144B2 patent drawing

AI summary

The present disclosure includes apparatuses and methods related to a memory apparatus and/or method for addressing in memory with a read identification (RID) number. An example apparatus can include a first memory device, a second memory device coupled to the first memory device, and a controller coupled to the first memory device and the second memory device, wherein the controller is configured to receive a read command requesting data from the first memory device, wherein the read command includes a read identification (RID) number that includes an address to identify a location of the data in the first memory device, and transfer the data from the location in the first memory device to the second memory device in response receiving the read command.