Uniform Rigid Interconnects for 3D Package Stacking
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Solution Overview
Problem
Current packaging methods for electronic components, such as wire bonding and solder ball grid arrays, face limitations in achieving high density and reducing failure rates in interconnected assemblies, particularly in stackable 3D integrated circuits where edge wiring increases package size and complexity.
Innovation Solution
The use of uniform, rigid interconnects, referred to as studs or nails, which are mounted between packages to support and electrically connect them, allowing for package-on-package assemblies with vertical stacking and reduced size, using methods like ultrasonic welding and laser trimming to ensure precise and uniform height alignment.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If wire bonding or solder ball grid arrays are used for joining packages, then electrical connections can be established, but the density of interconnects is limited and failure rates increase
Solution Approach 1:
The patent transitions from planar interconnect arrangements (wire bonding, solder balls) to three-dimensional stacked packages with vertical interconnects. Multiple packages are stacked vertically with interconnects extending through the stack, enabling high-density connections in the vertical dimension while reducing the footprint area.
Solution Approach 2:
The interconnect structure is segmented into multiple discrete rigid interconnects distributed throughout the package stack. Each rigid interconnect provides an independent electrical pathway, allowing high interconnect density while maintaining reliability through redundancy and reduced stress concentration.
2Ease of operation
If edge wiring is used to wire chips together in 3D packages, then connectivity is achieved, but the package length and width increase
Solution Approach 1:
The patent replaces edge wiring (planar connections) with vertical interconnects extending through the package stack. This dimensional transition allows multiple chips to be connected in three dimensions, achieving full connectivity while minimizing the package footprint area.
3Quantity of substance
If through-silicon vias are used to create vertical connections, then interconnect density increases, but manufacturing complexity increases
Solution Approach 1:
The patent extracts the interconnect function from the substrate material (silicon) and implements it as separate rigid interconnect structures. This separation simplifies manufacturing by allowing rigid interconnects to be added independently of substrate processing, avoiding the complexity of forming high-density through-silicon vias.
Solution Approach 2:
Rigid interconnects serve as intermediary elements between chips in the stack. These mediators provide electrical connections without requiring direct through-substrate vias, simplifying the manufacturing process while maintaining high interconnect density.
4Ease of manufacture
If non-uniform interconnect heights are used in package stacks, then assembly is simpler, but alignment precision and electrical connection reliability deteriorate
Solution Approach 1:
The patent implements height adjustment features on rigid interconnects before final package assembly. This preliminary action ensures uniform interconnect heights are achieved, improving alignment precision and electrical connection reliability while maintaining assembly simplicity through pre-configured interconnect structures.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enables a higher density of interconnects, reduces assembly failure rates, and allows for the creation of flatter 3D packages by eliminating the need for interposer layers, thereby enhancing connectivity and reducing package size while maintaining reliable electrical connections.
Implementation Method 1
using methods like ultrasonic welding and laser trimming to ensure precise and uniform height alignment
Implementation Method 2
using methods like ultrasonic welding and laser trimming to ensure precise and uniform height alignment
Data Source
AI summary
Disclosed herein is a system and method for mounting semiconductor packages by forming one or more interconnects, optionally, with a wirebonder, and mounting the interconnects to a mounting pad on a target package. Mounting the interconnect may comprise ultrasonically welding the interconnects to the mounting pads, and the interconnect may be mounted via a mounting node on the end of the interconnect, wherein the mounting node may be formed by an electric flame off process. The interconnects may be trimmed to one or more substantially uniform heights, optionally using a laser or contact-type trimming system, and the tails of the interconnects may be supported during trimming. A top package may be bonded on the trimmed ends of the interconnects. During mounting, a support plate may be used to support the package, and a mask maybe used during interconnect mounting.