Rigid Intermediate Layer for Semiconductor Package Warpage Control

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Solution Overview

Problem

The scaling-down of semiconductor electronic devices leads to issues such as warpage, affecting electrical characteristics, quality, cost, and yield, and poses challenges in maintaining reliable bonding between semiconductor chips.

Innovation Solution

Incorporating a first rigid layer or metal layer in the intermediate structure between semiconductor chips to control warpage, enhancing bonding reliability by interposing a periphery portion of the layer that overlaps encapsulants, thereby reducing the risk of delamination.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Volume of moving object

If semiconductor device dimensions are scaled down to meet application requirements, then device density and integration are improved, but warpage control deteriorates

Engineering Contradiction:
Improvedevice dimensionsVSAvoidwarpage control
Core Design Contradiction:
Volume of moving objectVSStability of the object's composition

Solution Approach 1:

The patent introduces a rigid layer with specific mechanical properties (high modulus of elasticity) into the package structure to counteract warpage. This changes the physical parameters of the package system by adding a layer with different stiffness characteristics, thereby compensating for the warpage issues arising from scaled-down device dimensions

Inventive Principle:
Principle #35Parameter changes

Solution Approach 2:

The patent employs a composite structure combining the semiconductor chip, encapsulant, and rigid layer. This composite material approach creates a multi-layer system where each material contributes its specific properties - the rigid layer provides structural support and warpage control while the encapsulant provides protection, achieving both miniaturization and stability

Inventive Principle:
Principle #40Composite materials

2Stability of the object's composition

If a rigid layer is added to control warpage, then warpage control and bonding reliability are improved, but device complexity increases

Engineering Contradiction:
Improvewarpage controlVSAvoidstructure complexity
Core Design Contradiction:
Stability of the object's compositionVSDevice complexity

Solution Approach 1:

The patent segments the package structure into distinct functional layers: the semiconductor chip, the encapsulant, and the rigid layer. This segmentation allows each layer to perform its specific function independently - the rigid layer focuses on warpage control while the encapsulant handles protection, simplifying the design approach despite adding a layer

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The rigid layer acts as an intermediary element between the semiconductor chip and the external environment. It mediates the mechanical stresses and provides a stable substrate for bonding, thereby improving bonding reliability without requiring fundamental changes to the chip design itself

Inventive Principle:
Principle #24Intermediary (Mediator)

Data Source

PatentUS20250385199A1Electronic device including rigid layer and method for manufacturing the same
Publication Date: 2025.12.18 NAN YA TECH
  • US20250385199A1 patent drawing
  • US20250385199A1 patent drawing
  • US20250385199A1 patent drawing

AI summary

The present application discloses an electronic device and a method for manufacturing the electronic device. The electronic device includes a first semiconductor chip encapsulated by a first encapsulant, a second semiconductor chip encapsulated by a second encapsulant and a first intermediate structure. The second semiconductor chip is disposed over and electrically connected to the first semiconductor chip. The first intermediate structure is interposed between the first semiconductor chip and the second semiconductor chip, and includes a first rigid layer. A periphery portion of the first rigid layer of the first intermediate structure vertically overlaps the first encapsulant and the second encapsulant, and is configured to control a warpage of the electronic device.