Audio Output Synchronization by Ring Buffer Clock Adjustment
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Solution Overview
Problem
Existing audio output devices using general-purpose CPUs without FPGA or DSP face challenges in clock synchronization, leading to issues like audio interruption and skipping, necessitating expensive dedicated signal processing circuits, complicating the device and increasing costs.
Innovation Solution
An audio output device with a communication section, buffer, audio processing section, oscillator, and clock control section that adjusts clock frequency based on buffer levels to maintain synchronization, using oscillators like VCXO, VC-TCXO, and VC-OCXO, without requiring additional costly components.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a dedicated signal processing circuit is added to count clocks for synchronization, then audio synchronization reliability is improved, but device complexity and cost increase
Solution Approach 1:
The audio output device uses its own existing buffer management system to automatically control clock frequency. The buffer's remaining level (how much audio data is left to be processed) serves as the control signal for the oscillator, eliminating the need for separate clock counting circuits. The system serves itself by using already-present components (buffer, CPU) to achieve synchronization.
Solution Approach 2:
The invention changes the control parameter from traditional clock counting methods to buffer remaining level. By monitoring how much audio data remains in the buffer and using this level as the control signal for frequency adjustment, the system achieves synchronization without dedicated hardware. The parameter transformation converts a software-manageable buffer state into a useful control signal.
2Reliability
If a dedicated signal processing circuit is added to count clocks for synchronization, then audio synchronization reliability is improved, but manufacturing cost increases
Solution Approach 1:
The audio output device uses its own existing buffer management system to automatically control clock frequency. The buffer's remaining level (how much audio data is left to be processed) serves as the control signal for the oscillator, eliminating the need for separate clock counting circuits. The system serves itself by using already-present components (buffer, CPU) to achieve synchronization.
Solution Approach 2:
The existing buffer, originally designed only for temporary audio data storage, is given an additional function: it provides the control signal for clock frequency adjustment. By making the buffer multi-functional (storage + control signal generation), the system avoids adding dedicated synchronization hardware, thereby reducing manufacturing cost while maintaining reliability.
3Reliability
If clock frequency is adjusted according to buffer remaining level, then audio synchronization is maintained, but device complexity increases
Solution Approach 1:
The audio output device uses its own existing buffer management system to automatically control clock frequency. The buffer's remaining level (how much audio data is left to be processed) serves as the control signal for the oscillator, eliminating the need for separate clock counting circuits. The system serves itself by using already-present components (buffer, CPU) to achieve synchronization.
Data Source
AI summary
To provide an audio output device and the like each of which is capable of reducing, with a simple configuration, a possibility of causing a trouble such as interruption and/or skipping of audio, the audio output device includes: a communication section receiving audio data from an audio transmitting device; a ring buffer in which the audio data received by the communication section is temporarily stored; an audio processing section obtaining the audio data from the ring buffer and carrying out an audio process on the audio data to output audio; an oscillator outputting a clock signal specifying operation of the audio processing section; and a clock control section controlling a frequency of the clock signal according to a remaining level of the ring buffer.