Ring Buffer Image Rotation for Variable Block Processing
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Solution Overview
Problem
Existing image rotation correction techniques in multifunction peripherals are inefficient due to the restriction of output block size by the angle of rotation and cache memory size, leading to increased CPU processing time and data transfer volume, especially with large rotation angles.
Innovation Solution
The implementation of a ring buffer memory and a memory control unit that dynamically manages the storage and discards unnecessary image data, allowing variable block sizes based on rotation and scaling factors, reducing the number of memory accesses and data transfer.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Loss of time
If rotation correction is performed using a fixed-size cache memory in units of blocks, then the cache hit ratio is improved, but the output block size is restricted by the cache memory size and rotation angle, increasing CPU processing time and data transfer volume
Solution Approach 1:
The patent applies dynamics by making the block size variable rather than fixed. The block size is dynamically adjusted based on the rotation angle and the number of scan lines, allowing the system to adapt to different rotation scenarios. This resolves the contradiction by enabling larger effective processing blocks for small rotations while maintaining manageable block sizes for large rotations, thus reducing CPU processing time without restricting adaptability.
Solution Approach 2:
The patent changes the parameter of block size from a fixed value to a variable that depends on rotation angle and scan line count. By adjusting this parameter dynamically, the system can optimize processing efficiency for different rotation scenarios. This parameter change allows the output block size to scale appropriately, reducing CPU processing time while maintaining adaptability to various rotation angles.
2Productivity
If the cache memory size is increased to accommodate larger output blocks, then the processing speed improves, but the device complexity and cost increase
Solution Approach 1:
Instead of increasing cache memory size statically, the patent uses dynamic block size adjustment based on rotation angle and scan line count. This allows the system to achieve high processing speeds for small rotations using moderate memory sizes, while handling large rotations through multiple passes. This dynamic approach improves productivity without proportionally increasing device complexity or memory requirements.
Solution Approach 2:
The patent segments the rotation processing into multiple passes when necessary, particularly for large rotation angles. Rather than requiring a single large cache memory to handle all cases, the system divides the processing into manageable segments that can be handled with smaller memory sizes. This segmentation maintains productivity while avoiding the need for large cache memory, thus reducing device complexity.
3Device complexity
If rotation correction is performed in units of fixed blocks, then the memory management is simplified, but the number of memory accesses increases for large rotation angles
Solution Approach 1:
The patent introduces dynamic block sizing that adapts to rotation angle and scan line count, rather than using fixed blocks. This dynamic approach optimizes the number of memory accesses by adjusting block size to match the actual processing requirements. For small rotations, larger blocks reduce memory access overhead, while for large rotations, the system can use multiple passes with appropriately sized blocks, thus improving productivity without excessively increasing memory management complexity.
Solution Approach 2:
The patent changes the block size parameter based on rotation angle and scan line count, allowing the system to minimize the number of memory accesses. By adjusting this parameter dynamically, the system can process more data per memory access when appropriate, thereby reducing total data transfer volume while keeping memory management complexity manageable through systematic parameter adjustment.
Data Source
AI summary
An image processing apparatus includes a ring buffer memory configured to store a partial image representing part of a block image obtained by dividing a band image obtained by dividing a scanned image in a unit of a band, further in a unit of a block; a memory control unit configured to control a storage status of the partial image in the ring buffer memory, a processing unit configured to perform rotation processing on the partial image stored in the ring buffer memory and output a rotated partial image, and a combining unit configured to combine a plurality of the rotated partial images outputted from the processing unit and output a rotated block image corresponding to the block image before being divided.


