Ring Bus Architecture for Multi-Engine Resource Sharing
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Solution Overview
Problem
Electronic systems with multiple interconnected modules face challenges in resource sharing due to high costs and performance losses caused by circuitry interconnections, which result in delays and timing issues during data and control information exchange.
Innovation Solution
A ring network system is implemented, where modules are connected via ring interfaces with dual buses for control and data/address transmission, enabling single-cycle transactions and efficient communication by forwarding transactions based on source and destination identifiers, and managing empty cycles for new transactions.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If modules are interconnected using traditional bus structures, then resource sharing is enabled, but interconnection costs and performance losses increase due to delays
Solution Approach 1:
The patent segments the communication system into multiple ring interfaces distributed across different modules, each managing local transactions independently. This segmentation reduces the impact of delays on overall system performance by allowing parallel transaction processing and eliminating the need for all modules to wait for a single centralized bus cycle.
Solution Approach 2:
The patent implements dynamic transaction management where ring interfaces can forward transactions to different destinations based on real-time needs. The system dynamically adjusts transaction routing and can handle multiple transactions concurrently, transforming the static bus structure into a flexible, adaptive communication system that reduces delays.
2Speed
If high-speed interconnection between modules is implemented, then data exchange speed increases, but timing problems occur
Solution Approach 1:
The patent uses preliminary action by having ring interfaces prepare and buffer transactions before transmission. Each ring interface maintains a queue of pending transactions and can pre-position data, allowing the high-speed interconnection to operate reliably by having receivers ready in advance and reducing the impact of timing variations during high-speed data exchange.
Solution Approach 2:
The patent implements feedback mechanisms where ring interfaces monitor transaction completion and status. This feedback allows the system to adjust timing dynamically, compensating for high-speed transmission variations and ensuring reliable operation by detecting and correcting timing issues as they occur during data exchange.
3Productivity
If multiple transactions are processed concurrently, then productivity increases, but transaction management complexity increases
Solution Approach 1:
The patent segments transaction management into independent units at each ring interface. Each interface manages its own local transactions and forwards others, distributing the management complexity across multiple simple units rather than requiring a single complex centralized manager. This enables concurrent transaction processing while keeping individual management tasks simple.
Solution Approach 2:
The patent introduces ring interfaces as intermediary components between modules. These intermediaries handle the complexity of transaction routing, buffering, and coordination, absorbing the management burden and presenting simple interfaces to the modules. This allows multiple transactions to be processed concurrently without increasing the complexity at the module level.
Data Source
AI summary
An electronic system including modules connected in a ring network is provided. The modules communicate via ring interfaces. The ring interfaces are connected by inter-module links that include a control bus and combined address and data bus. The ring interfaces send and receive single-cycle transactions. The control bus signals the type of transaction and the source and destination modules. The ring interfaces forward transactions to their destinations and may send new transaction when a cycle is empty. Each read operation uses a read request transaction containing an address that is responded to with an acknowledgment transaction that includes the requested data. Each write operation uses two write requests, one containing an address and one containing data. The destination module signals completion of the write operation by sending an acknowledgment transaction.