Ring Phase-Shifting Clock Generator for Low-Power Skew Correction
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Solution Overview
Problem
Existing multi-phase clock signal generators require large circuit areas and high power consumption, and struggle with phase skew accuracy, especially in high-speed applications, due to sensitivity to supply voltage noise and complex control logic.
Innovation Solution
A multi-phase clock generator with a ring phase shifting loop and phase adjusting circuit that uses a small number of devices to generate accurate clock signals with minimal power consumption, where the frequency is determined by an external clock signal and phase skew is corrected using a sensing mechanism, allowing for ultra-wide range operation and power-down saving modes.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Power
If a quadrature PLL utilizing a quadrature oscillator is used to generate multi-phase clock signals, then the frequency can be controlled by voltage, but the circuit becomes sensitive to supply voltage noise and consumes high power
Solution Approach 1:
The patent replaces the voltage-controlled quadrature oscillator with a digitally controlled ring oscillator. Instead of using voltage to control frequency (analog mechanism), the invention uses digital control signals to select from pre-configured phase shift amounts in the ring oscillator stages, eliminating sensitivity to supply voltage noise while reducing power consumption.
Solution Approach 2:
The ring oscillator automatically generates the desired phase-shifted clock signals through its intrinsic oscillation mechanism. The phase shift amounts are determined by the configuration of logic gates and inverters within the ring structure itself, without requiring external voltage control or complex analog circuitry, thereby reducing power consumption and improving reliability.
2Area of stationary object
If an analog multi-phase generator utilizing a delay chain controlled by a charge pump is used, then multi-phase clock signals can be generated, but the circuit area becomes huge and power consumption is high
Solution Approach 1:
The ring oscillator is divided into multiple independent stages, each contributing a specific phase shift. By segmenting the overall phase generation function into discrete stages with fixed phase shift amounts, the circuit achieves multi-phase output without requiring a large analog delay chain or charge pump, thereby reducing both circuit area and power consumption.
Solution Approach 2:
The invention changes the control parameter from analog voltage (in charge pump-based designs) to digital control signals that select predetermined phase shift amounts. This parameter change allows the circuit to achieve flexible phase control with significantly reduced circuit area and power consumption, as digital logic requires much less area and power than analog delay chains.
3Measurement precision
If multiple delay lock loops are used to correct phase skew, then phase skew accuracy can be improved, but the circuit size increases, power consumption increases, and control logic becomes very complicated
Solution Approach 1:
The patent combines multiple phase shift functions into a single ring oscillator structure. Instead of using multiple separate delay lock loops to correct phase skew, the invention integrates phase shifting and phase skew correction within the same ring oscillator by configuring the logic gates and inverters to provide predetermined phase shifts that inherently compensate for skew, thereby reducing circuit size and control logic complexity.
Solution Approach 2:
The ring oscillator is designed with predetermined phase shift amounts built into its structure through specific configurations of logic gates and inverters. This preliminary configuration of phase shift values allows the circuit to achieve accurate phase skew correction without requiring complex real-time control logic or multiple feedback loops, simplifying the overall system while maintaining high precision.
4Measurement precision
If a ring phase shifting loop with many devices is used to generate multi-phase clock signals, then phase resolution can be improved, but circuit size and power consumption increase
Solution Approach 1:
Each stage of the ring oscillator is designed with specific local characteristics (different numbers of logic gates or inverters) to provide predetermined phase shift amounts. By optimizing the local configuration of each stage, the circuit achieves high phase resolution without requiring a proportional increase in overall circuit area, as each stage contributes efficiently to the total phase resolution.
Data Source
AI summary
A signal phase adjusting loop comprising a multiphase generator and a phase adjusting circuit. The multiphase generator comprises a ring phase shifting loop having a plurality of output terminals and phase shifting units. The ring phase shifting loop phase-shifts the delayed input clock signal to generate output clock signals with different phases, wherein the output clock signals are respectively output at different output terminals. The phase adjusting circuit receives one of the output clock signals and an input signal to adjust a phase of the input signal according to a phase of the one of the output clock signals.


