Ring Encoder Cycle Counter for Synthesizer Frequency Estimation
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Solution Overview
Problem
Conventional methods for monitoring frequency error and linearity in high-frequency synthesizers, such as those used in automotive radar systems, are inadequate due to the slow speed of binary counters and the need for external equipment, which can lead to performance degradation and safety issues.
Innovation Solution
The implementation of a frequency synthesizer output cycle encoder and counter (OCEC) module, comprising a high-speed ring encoder and a low-speed binary counter, along with a frequency estimator module that uses a reference clock to accurately estimate the instantaneous or average clock frequency and monitor frequency ramp linearity on-chip, enabling real-time and off-line high-resolution measurements without external equipment.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If a binary counter is used to measure the frequency of a high-frequency clock output (≥5 GHz), then the measurement can be performed using conventional methods, but the counter speed is too slow to accurately measure the high frequency
Solution Approach 1:
The patent divides the frequency measurement task into two segments: a high-speed ring encoder that counts clock cycles at the high frequency (≥5 GHz) and a low-speed binary counter that counts the encoder's output. This segmentation allows each counter to operate at its optimal speed, with the ring encoder handling the high-frequency counting and the binary counter aggregating the results, thereby resolving the contradiction between counter speed and measurement accuracy.
2Ease of operation
If conventional down-sampling and digitization methods are used to monitor frequency error, then the measurement can be performed, but external equipment is required and the process is complex
Solution Approach 1:
The patent implements a self-service measurement system where the frequency error monitoring is performed entirely within the synthesizer chip using integrated ring encoders and binary counters. The system uses its own internal resources to measure its own output frequency error, eliminating the need for external measurement equipment and simplifying the overall system while maintaining measurement accuracy.
3Reliability
If the frequency error monitoring is performed in real-time on-chip, then continuous monitoring can be achieved, but the chip area and power consumption increase
Solution Approach 1:
The patent employs dynamic operation of the ring encoder and binary counter, where the high-speed ring encoder is activated only when high-frequency measurement is needed, and the system dynamically switches between measurement modes. This dynamic approach allows real-time monitoring capability while reducing average power consumption and optimizing chip area utilization, as the high-speed counting resources are not continuously active but only when required for accurate frequency error measurement.
Data Source
AI summary
A method of frequency estimation. A clock output from a frequency synthesizer is received at an input of a ring encoder. The ring encoder generates outputs including a ring encoder output clock and an encoded output which represents LSBs of a clock cycle count of the clock output. A binary counter is run using the ring encoder output clock which provides an output count which represents MSBs of the clock cycle count. Using a reference clock, the encoded output is sampled to provide a sampled encoded output and the output count is sampled to provide a sampled output count. Error correcting is applied to the sampled encoded output to provide a corrected sampled encoded output. The corrected sampled encoded output and sampled output count are combined to provide a combined output which is used for estimating an instantaneous or average frequency of the clock output.