Ring Gate and Field Plate Layout for Lower Parasitic Capacitance
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Solution Overview
Problem
Semiconductor devices with dot-shaped field plate electrodes face challenges in reducing parasitic capacitance, which limits their operation speed due to high parasitic capacitance values between electrodes and the semiconductor part.
Innovation Solution
The semiconductor device design includes a gate electrode with a ring portion and an extension portion, where the FP electrode is located lower than the gate electrode, connected by a narrower FP plug, reducing parasitic capacitance by increasing the distance between the FP plug and the gate electrode and the semiconductor part.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If dot-shaped field plate electrodes are used to increase breakdown voltage or reduce on-resistance, then the electrical performance is improved, but the parasitic capacitance increases which limits operation speed
Solution Approach 1:
The gate electrode is divided into two separate components: a ring portion and an extension portion. The ring portion is positioned closer to the field plate electrode to maintain electrical performance, while the extension portion extends toward the drain to reduce parasitic capacitance. This segmentation allows each part to optimize its function independently.
Solution Approach 2:
The gate electrode structure transitions from a conventional single-layer design to a multi-dimensional configuration with the ring portion in a first plane and the extension portion extending in a second direction. This dimensional change enables spatial optimization of both breakdown voltage and parasitic capacitance characteristics.
2Reliability
If the field plate electrode is positioned closer to increase electrical performance, then breakdown voltage improves, but parasitic capacitance between the field plate electrode and gate electrode increases
Solution Approach 1:
Different portions of the gate electrode structure have different functions and geometries. The ring portion is designed with a specific shape to optimize field distribution and breakdown voltage, while the extension portion is designed to minimize capacitive coupling. This local quality differentiation allows simultaneous optimization of both parameters.
Solution Approach 2:
The ring portion acts as an intermediary structure between the field plate electrode and the extension portion. It provides the necessary electrical field control for breakdown voltage while the extension portion mediates the reduction of parasitic capacitance by extending the gate control region.
3Ease of manufacture
If a conventional gate electrode design is used, then manufacturing is simpler, but parasitic capacitance is higher reducing operation speed
Solution Approach 1:
The ring portion and extension portion are formed as an integrated structure during the manufacturing process, with the extension portion extending from the ring portion in a predetermined direction. This preliminary formation of the complete gate structure simplifies subsequent manufacturing steps while achieving the desired electrical characteristics.
Data Source
AI summary
A semiconductor device includes a first electrode, a second electrode located on the first electrode, a semiconductor part located between the first electrode and the second electrode, a first interconnect located between the semiconductor part and the second electrode, a third electrode located in the semiconductor part and separated from the semiconductor part, a fourth electrode located lower than the third electrode in the semiconductor part, a first plug connecting the second electrode to the fourth electrode, and a second plug. The third electrode includes a ring portion, and an extension portion extending from the ring portion into an interior of the ring portion. The fourth electrode is located in the interior of the ring portion in a plane perpendicular to a vertical direction. The fourth electrode is separated from the semiconductor part. The second plug connects the first interconnect to the extension portion.