Ring-Based Power Budgeting Across Multiple Memory Devices

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Solution Overview

Problem

Existing electronic systems face inefficiencies in power management of multiple memory devices, leading to either overdesigning for worst-case scenarios or compromising performance due to fixed power limits, resulting in suboptimal power efficiency and performance.

Innovation Solution

A method for dynamically managing power among multiple memory devices by setting a predefined power budget and using peer-to-peer communication to adjust individual device power levels based on system power consumption, ensuring the total power consumption remains within the budget while allowing each device to operate in its full power range.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If the electronic system is overdesigned to accommodate the worst-case scenario where all memory devices operate at maximum power levels, then the system can handle peak power demands, but the initial cost and recurring cost of the design increase significantly

Engineering Contradiction:
Improvesystem ability to handle peak power demandsVSAvoidinitial cost and recurring cost
Core Design Contradiction:
ReliabilityVSEase of manufacture

Solution Approach 1:

The patent implements dynamic power management where each memory device continuously adjusts its power consumption based on real-time system conditions. The host device monitors total power consumption and sends power adjustment commands to individual memory devices, allowing the system to adapt power levels dynamically rather than being fixed at worst-case design levels. This resolves the contradiction by enabling the system to handle peak demands when needed while operating efficiently at lower power levels during normal operation, thereby reducing both initial and recurring costs.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The patent employs a feedback mechanism where the host device continuously monitors the total power consumption of all memory devices and adjusts individual device power levels accordingly. The host receives power status information from each memory device and sends control commands to adjust power consumption. This closed-loop feedback system allows the electronic system to maintain reliability by responding to actual power conditions rather than relying on overdesign for worst-case scenarios, thus reducing unnecessary costs.

Inventive Principle:
Principle #23Feedback

2Use of energy by stationary object

If a moderate power limit is set for the total power of memory devices in the electronic system, then the power consumption is controlled within acceptable levels, but the power available to each individual memory device is limited

Engineering Contradiction:
Improvetotal power consumptionVSAvoidperformance of individual memory devices
Core Design Contradiction:
Use of energy by stationary objectVSProductivity

Solution Approach 1:

The patent enables dynamic power allocation where memory devices can temporarily exceed their average power allocation when system conditions permit. Instead of imposing static power limits, the system continuously adjusts power levels based on real-time monitoring of total power consumption and individual device needs. This allows the total power to remain controlled while enabling individual devices to achieve peak performance when necessary, resolving the contradiction between power control and device productivity.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The patent changes the power consumption parameters of memory devices dynamically based on system conditions. The host device adjusts power levels of individual memory devices by modifying operational parameters such as cache size, buffer size, and data transfer rates. This allows the system to maintain total power within acceptable limits while enabling individual devices to operate at optimal performance levels when power headroom is available, thus resolving the contradiction between power control and productivity.

Inventive Principle:
Principle #35Parameter changes

3Device complexity

If fixed power limits are imposed on memory devices, then power management becomes simpler, but power efficiency and overall system performance are compromised

Engineering Contradiction:
Improvepower management complexityVSAvoidpower efficiency
Core Design Contradiction:
Device complexityVSLoss of energy

Solution Approach 1:

The patent implements a self-service power management mechanism where each memory device autonomously adjusts its own power consumption based on system conditions and host commands. Each memory device includes internal logic to interpret power control commands and modify its operational parameters accordingly. This distributed self-service approach maintains relatively simple power management at the host level while enabling efficient power utilization at each device, resolving the contradiction between management simplicity and power efficiency.

Inventive Principle:
Principle #25Self-service

Solution Approach 2:

The patent utilizes parameter changes to achieve efficient power management without excessive complexity. The host device sends control commands that modify operational parameters of memory devices such as cache configuration, buffer sizes, and data transfer rates. These parameter adjustments enable dynamic power optimization while maintaining manageable system complexity, as the changes are implemented through standardized interfaces and protocols rather than requiring complex hardware modifications.

Inventive Principle:
Principle #35Parameter changes

Data Source

PatentUS12422914B2Dynamic power management among multiple memory devices
Publication Date: 2025.09.23 SK HYNIX NAND PRODUCT SOLUTIONS CORP
  • US12422914B2 patent drawing
  • US12422914B2 patent drawing
  • US12422914B2 patent drawing

AI summary

This application is directed to dynamic power management among multiple memory devices of an electronic system. A plurality of memory devices are coupled into a ring of memory devices, and passes a power data packet along a power control path that tracks the ring of memory devices continuously. During a current cycle, a first memory device receives the power data packet from an upstream memory device on the power control path, and the power data packet includes at least a system power level indicating total power consumption of the plurality of memory devices. The first memory device sets a current power level of the first memory device based on the received power data packet, updates the power data packet based on the current power level, and sends the updated power data packet to a downstream memory device on the power control path.