Ring-Shaped MTJ Layout for Compact MRAM With Stable Data Retention

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Solution Overview

Problem

Existing magnetoresistive random access memory (MRAM) devices face challenges such as high chip area, high cost, high power consumption, limited sensibility, and susceptibility to temperature variations.

Innovation Solution

A semiconductor device design featuring a substrate with an array region and a ring of magnetic tunneling junction (MTJ) regions surrounding the array region, with metal interconnect patterns overlapping parts of the MTJ regions, optimizing the layout to reduce chip area and improve performance.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Area of stationary object

If traditional MRAM device layout is used, then data retention capability is maintained, but chip area increases and manufacturing cost increases

Engineering Contradiction:
Improvechip areaVSAvoiddata retention capability
Core Design Contradiction:
Area of stationary objectVSReliability

Solution Approach 1:

The patent implements a ring-shaped MTJ region that surrounds the array region, creating a nested configuration where the sensing element is positioned within the memory array structure. This nesting approach allows the sensing function to be integrated within the existing memory cell footprint, thereby reducing overall chip area while preserving data retention capabilities through the maintained MTJ structure.

Inventive Principle:
Principle #7Nested doll (Nesting)

Solution Approach 2:

The patent transitions from a planar layout to a three-dimensional stacked architecture by positioning the ring-shaped MTJ region in a different spatial layer or configuration around the array region. This dimensional change enables enhanced sensing capability without proportionally increasing the planar chip area, as the sensing structure utilizes vertical or radial space rather than only horizontal expansion.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

2Use of energy by stationary object

If traditional MRAM device layout is used, then data retention capability is maintained, but power consumption increases

Engineering Contradiction:
Improvepower consumptionVSAvoiddata retention capability
Core Design Contradiction:
Use of energy by stationary objectVSReliability

Solution Approach 1:

The ring-shaped MTJ region is nested within the memory array structure, allowing the sensing operation to be performed using the same physical structure that stores data. This integration eliminates the need for separate sensing components that would require additional power, thereby reducing overall power consumption while maintaining data retention through the preserved MTJ memory cells.

Inventive Principle:
Principle #7Nested doll (Nesting)

3Ease of manufacture

If traditional MRAM device layout is used, then data retention capability is maintained, but manufacturing cost increases

Engineering Contradiction:
Improvemanufacturing costVSAvoiddata retention capability
Core Design Contradiction:
Ease of manufactureVSReliability

Solution Approach 1:

The ring-shaped MTJ region is formed using the same fabrication processes and material layers as the array region, creating a unified structure that can be manufactured in a single production run. This approach eliminates the need for separate manufacturing steps for sensing components, thereby reducing manufacturing complexity and cost while maintaining data retention capability through the integrated MTJ structure.

Inventive Principle:
Principle #7Nested doll (Nesting)

4Temperature

If traditional MRAM device layout is used, then data retention capability is maintained, but temperature stability deteriorates

Engineering Contradiction:
Improvetemperature stabilityVSAvoiddata retention capability
Core Design Contradiction:
TemperatureVSReliability

Solution Approach 1:

The ring-shaped MTJ region surrounding the array region creates a symmetric geometric configuration that distributes thermal stress uniformly around the memory cells. This symmetric nesting structure helps compensate for temperature-induced variations in magnetic properties, thereby improving temperature stability while preserving data retention capability through the maintained MTJ configuration.

Inventive Principle:
Principle #7Nested doll (Nesting)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The proposed design enhances the efficiency and reliability of MRAM devices by reducing chip area, lowering power consumption, and improving temperature stability, while maintaining data retention capabilities.

Implementation Method 1

Magnetoresistance (MR) effect has been known as a kind of effect caused by altering the resistance of a material through variation of outside magnetic field. The physical definition of such effect is defined as a variation in resistance obtained by dividing a difference in resistance under no magnetic interference by the original resistance.

Methodology Applied
Scientific EffectMagnetoresistance effect: Magnetoresistance

Implementation Method 2

various magnetic field sensor technologies such as anisotropic magnetoresistance (AMR) sensors, GMR sensors, magnetic tunneling junction (MTJ) sensors have been widely developed in the market

Methodology Applied
Scientific EffectMagnetic tunneling junction effect:

Data Source

PatentUS12268098B2Magnetoresistive random access memory having a ring of magnetic tunneling junction region surrounding an array region
Publication Date: 2025.04.01 UNITED MICROELECTRONICS CORP
  • US12268098B2 patent drawing
  • US12268098B2 patent drawing
  • US12268098B2 patent drawing

AI summary

A semiconductor device includes a substrate having an array region defined thereon, a ring of magnetic tunneling junction (MTJ) region surrounding the array region, a gap between the array region and the ring of MTJ region, and metal interconnect patterns overlapping part of the ring of MTJ region. Preferably, the array region includes a magnetic random access memory (MRAM) region and a logic region and the ring of MTJ region further includes a first MTJ region and a second MTJ region extending along a first direction and a third MTJ region and a fourth MTJ region extending along a second direction.