Current-Starved Ring Oscillator Biasing for Fast Stable Tuning

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Solution Overview

Problem

Conventional current starved ring oscillators face challenges in temperature compensation and tuning for multiple oscillation frequencies, often experiencing uncontrolled frequency transients and difficulty in achieving fast start/stop operations.

Innovation Solution

The proposed solution involves an unbalanced transistor configuration in the inverter stages, where p-channel MOS transistors are designed to be more conductive than n-channel MOS transistors, with specific transistor sizing and a biasing circuit to maintain the oscillator supply voltage at a null point, enabling temperature compensation and fast start/stop operations.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If conventional current starved ring oscillators are used, then temperature compensation may be achieved by proper sizing, but tuning for multiple oscillation frequencies is difficult and start/stop transients are uncontrolled

Engineering Contradiction:
Improvetuning capability for multiple frequenciesVSAvoidcircuit complexity
Core Design Contradiction:
Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The patent applies dynamics by making the transistor conductance adjustable through biasing voltages. The first and second biasing voltages applied to the gates of the n-channel and p-channel transistors respectively, allow dynamic control of the oscillation frequency without changing the physical structure, enabling multi-frequency operation while maintaining temperature compensation.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The patent changes the electrical parameters (conductance) of the transistors by applying different biasing voltages. By varying the biasing voltages on the n-channel and p-channel transistors, the oscillation frequency can be tuned across multiple frequencies while the unbalanced configuration maintains temperature compensation characteristics.

Inventive Principle:
Principle #35Parameter changes

2Reliability

If current starved ring oscillators are used, then power consumption is controlled, but start/stop operation exhibits uncontrolled frequency transients

Engineering Contradiction:
Improvestart/stop operation controlVSAvoidstart/stop transient phase
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The patent applies preliminary action by pre-biasing the n-channel and p-channel transistors through dedicated biasing circuits before oscillation starts. This preliminary biasing establishes stable operating points that eliminate uncontrolled frequency transients during start/stop operations, allowing rapid transitions without transient phases.

Inventive Principle:
Principle #10Preliminary action

3Reliability

If unbalanced transistor configuration is used, then temperature compensation and fast start/stop are achieved, but transistor sizing becomes more complex

Engineering Contradiction:
Improvetemperature stabilityVSAvoidtransistor sizing design
Core Design Contradiction:
ReliabilityVSEase of manufacture

Solution Approach 1:

The patent deliberately uses asymmetry by configuring the n-channel and p-channel transistors with different sizing ratios and different biasing voltages. This unbalanced configuration is designed to maintain the oscillation point at the null point for temperature compensation, and the systematic approach to asymmetric sizing simplifies rather than complicates the manufacturing process.

Inventive Principle:
Principle #4Asymmetry

Data Source

PatentEP4106191B1Ring oscillator circuit
Publication Date: 2026.03.18 STMICROELECTRONICS (ALPS) SAS
  • EP4106191B1 patent drawingFigure 1~2
  • EP4106191B1 patent drawingFigure 3~4
  • EP4106191B1 patent drawingFigure 5

AI summary

A ring oscillator (50) comprises a chain of inverters (52) coupled between an oscillator supply node (54) and a reference node (56), and a current generator (58) coupled between the oscillator supply node and a system supply node (60) and configured to inject a current (IOSC) into the oscillator supply node. Each inverter comprises a first (NF) and a second (NL) low-side transistors coupled in series between the reference node and an output node of the inverter, and a first high-side transistor (PF1) coupled between the oscillator supply node and the output node of the inverter. The first low-side transistor and the first high-side transistor have respective control terminals coupled to an input node of the inverter to receive a respective inverter control signal (CK). The second low-side transistor has a control terminal coupled to the oscillator supply node. The ring oscillator circuit further comprises a biasing circuit (500) including a first bias transistor (NFZ) and a second bias transistor (NLZ) coupled in series between the reference node and the oscillator supply node. The first bias transistor has a control terminal configured to receive an oscillator control signal (StartP) indicative of whether the ring oscillator is in an active or inactive operation state. The second bias transistor has a control terminal coupled to the oscillator supply node. The first bias transistor is configured to selectively couple the reference node and the oscillator supply node in response to the ring oscillator being in an inactive operation state.