Ring Oscillator Clock Circuit for Multi-Phase Mismatch Reduction

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

Semiconductor memory devices experience phase-to-phase mismatching, duty cycle variation, and jitter in multi-phase clock circuits, leading to data distortion, read errors, and write errors, especially at high clock frequencies.

Innovation Solution

Implementing a ring oscillator circuit in the clock circuit to equalize clock parameters across multiple clock signals, reducing phase-to-phase mismatch, duty cycle variation, and jitter without additional correction circuitry.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If multi-phase clock circuits are used to increase data rate, then productivity is improved, but phase-to-phase mismatch and jitter increase causing reliability degradation

Engineering Contradiction:
Improvedata rateVSAvoidphase-to-phase mismatch
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

The patent combines multiple clock signals into a single integrated ring oscillator circuit that generates all four phase signals. This merging approach ensures consistent phase relationships among all clock signals while maintaining high data rates, thereby improving reliability without sacrificing productivity

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The ring oscillator circuit acts as an intermediary between the external clock input and the internal multi-phase clock distribution network. It receives a single external clock signal and internally generates the required multi-phase signals with controlled phase relationships, mediating the transition from single-phase input to multi-phase output while maintaining signal integrity

Inventive Principle:
Principle #24Intermediary (Mediator)

2Reliability

If additional correction circuitry is added to reduce phase mismatch, then reliability is improved, but device complexity increases

Engineering Contradiction:
Improvephase-to-phase mismatch reductionVSAvoidcorrection circuitry
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The ring oscillator circuit is self-configuring and automatically establishes correct phase relationships among its output signals. It does not require external correction circuitry or additional control logic to maintain phase coherence, as the inherent ring oscillator topology naturally provides the required phase distribution, thereby improving reliability without increasing device complexity

Inventive Principle:
Principle #25Self-service

Solution Approach 2:

The ring oscillator circuit performs multiple functions simultaneously: it acts as a clock signal generator, a phase distributor, and a timing reference source for the entire memory device. This multi-functionality eliminates the need for separate correction circuits, reducing overall device complexity while maintaining high reliability

Inventive Principle:
Principle #6Universality (Multi-functionality)

Data Source

PatentUS12387778B2Phase-to-phase mismatch reduction in a clock circuit of a memory device
Publication Date: 2025.08.12 MICRON TECHNOLOGY INC
  • US12387778B2 patent drawing
  • US12387778B2 patent drawing
  • US12387778B2 patent drawing

AI summary

A memory device may include memory cell array a clock circuit configured to generate a plurality of clock signals for access operations associated with the memory cell array. The clock circuit may include a ring oscillator circuit that is configured to equalize phase distortions of the plurality of clock signals.