Ring Oscillator PLL Frequency Control via DC Bias Adjustment

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Solution Overview

Problem

Current PLL circuits face challenges in achieving wide-range oscillation frequency variability due to significant variations in transistor capability caused by processing, power source voltage, and temperature, limiting the adjustability of oscillator characteristics and maximum oscillation frequency.

Innovation Solution

An oscillation device with multiple delay elements and a direct current control signal generation unit that adjusts direct current voltage levels to control transistor drive capability, allowing for flexible oscillation frequency control through a ring oscillator configuration.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If a ring oscillator is used to widen frequency variable width, then the oscillation frequency range is expanded, but the maximum oscillation frequency is limited due to transistor capability variation

Engineering Contradiction:
Improvefrequency variable widthVSAvoidmaximum oscillation frequency
Core Design Contradiction:
Adaptability or versatilityVSReliability

Solution Approach 1:

The patent changes the DC voltage level parameter of the input signal to the delay elements. By adjusting the DC voltage level, the drive capability of the transistors is controlled, which directly affects the delay time and consequently the oscillation frequency. This allows the maximum oscillation frequency to be adjusted according to transistor capability variations due to processing, power source voltage, and temperature.

Inventive Principle:
Principle #35Parameter changes

2Speed

If transistor capability is increased to achieve higher oscillation frequency, then maximum oscillation frequency improves, but variation due to processing, power source voltage, and temperature increases

Engineering Contradiction:
Improveoscillation frequencyVSAvoidtransistor capability variation
Core Design Contradiction:
SpeedVSStability of the object's composition

Solution Approach 1:

The patent introduces a feedback mechanism where the DC voltage level is adjusted based on the actual transistor capability. The control signal generation unit determines the appropriate DC voltage level to compensate for transistor capability variations, creating a closed-loop system that maintains stable oscillation characteristics despite environmental and manufacturing variations.

Inventive Principle:
Principle #23Feedback

3Adaptability or versatility

If DC voltage level is adjusted to control transistor drive capability, then oscillation frequency variability is improved, but device complexity increases

Engineering Contradiction:
Improveoscillation frequency controlVSAvoidcontrol circuit complexity
Core Design Contradiction:
Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The patent segments the control function into distinct units: the control signal generation unit that determines the DC voltage level based on transistor capability, and the delay elements that apply this control. This segmentation allows for modular design and implementation of the frequency control mechanism.

Inventive Principle:
Principle #1Segmentation

Data Source

PatentUS12199625B2Oscillation device and PLL circuit
Publication Date: 2025.01.14 SONY SEMICON SOLUTIONS CORP
  • US12199625B2 patent drawing
  • US12199625B2 patent drawing
  • US12199625B2 patent drawing

AI summary

There is provided an oscillation device includes multiple delay elements that each sequentially delay an input signal, and return at least some of the delayed signals to a preceding stage to generate an oscillation signal. The oscillation device further includes a first control terminal that inputs, to the multiple delay elements, a direct current control signal for collectively controlling direct current voltage levels of the input signal to be input in plural number to the multiple delay elements.