Ring Oscillator Delay Control for Low-Power Memory Timing
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Existing memory systems face challenges in reducing power consumption while maintaining accurate periodic signals, which is crucial for the operation of oscillators in memory devices.
Innovation Solution
An oscillator design featuring an odd number of sequentially coupled inverters, where the output signal of the last stage is fed back as the input signal to the first stage, along with a power voltage supply unit, bias unit, and ground voltage supply unit to control current consumption, and each inverter includes delay control units to adjust signal delays.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Use of energy by moving object
If conventional oscillators are used to generate periodic signals in memory systems, then the oscillation function is achieved, but power consumption is excessive
Solution Approach 1:
The oscillator is divided into multiple inverter stages (first inverter, second inverter, third inverter, etc.) that are sequentially coupled. Each stage processes the signal independently, allowing for better control of power consumption while maintaining signal integrity. The segmentation enables selective activation and optimization of each stage's power usage.
Solution Approach 2:
The oscillator generates periodic clock signals through the sequential coupling of inverters, where the output of the last inverter is fed back to the input of the first inverter. This periodic action creates stable oscillation while the delay units optimize the timing to reduce power consumption during signal transitions.
2Measurement precision
If simple inverter coupling is used to generate oscillation, then the circuit is simple, but signal period accuracy is insufficient
Solution Approach 1:
Delay units are incorporated into each inverter stage to pre-adjust the signal timing before it reaches the next stage. This preliminary action ensures that each stage receives properly timed signals, improving overall period accuracy without requiring complex feedback control mechanisms.
Solution Approach 2:
The output signal of the last inverter is fed back to the input of the first inverter, creating a closed-loop system. This feedback mechanism allows the oscillator to self-correct and maintain accurate periodic signals while the delay units fine-tune the timing characteristics.
3Manufacturing precision
If multiple delay control units are added to each inverter, then signal delay precision is improved, but device complexity increases
Solution Approach 1:
The delay units are designed with controllable delay characteristics that can be dynamically adjusted. This dynamic capability allows precise control of signal propagation time through each inverter stage, enabling accurate period control while maintaining a relatively simple structural implementation through standardized delay cell designs.
Data Source
AI summary
There are provided an oscillator and a memory system including the same. In the oscillator including an odd number of inverters sequentially coupled, in which an output signal of an inverter of a last stage is fed back as an input signal of an inverter of a first stage, wherein each of the inverters includes: a first input signal control unit configured to delay an input signal of each of the inverters by a first delay time or a second delay time and output a first delay input signal; a second input signal control unit configured to delay the input signal by a third delay time or a fourth delay time and output a second delay input signal; and a signal output unit configured to an output signal in response to the first delay input signal and the second delay input signal.