Ring Oscillator Layout for Accurate Propagation Delay Measurement

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Solution Overview

Problem

Conventional methods for measuring signal propagation delays in integrated circuits (ICs) face inaccuracies due to the inclusion of enable circuits that introduce unnecessary and uncertain signal delays, making it difficult to accurately determine delays through synchronous elements.

Innovation Solution

An oscillator circuit with synchronous elements connected in a loop uses an independent enable circuit that does not affect the delay path, allowing for more accurate measurement of signal delays by eliminating extraneous gate delays and signal delays associated with the enable circuit.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Ease of operation

If an enable circuit is used to control the oscillator, then the oscillator can be enabled and disabled, but the enable circuit introduces extraneous gate delays and signal delays that reduce measurement precision

Engineering Contradiction:
Improveoscillator controlVSAvoiddelay measurement accuracy
Core Design Contradiction:
Ease of operationVSMeasurement precision

Solution Approach 1:

The patent removes the enable circuit from the oscillator's delay path entirely. The oscillator core consists of synchronous elements connected in a loop without any enable gating, thereby extracting the source of measurement error from the measurement system.

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The patent separates the oscillator functionality from the enable control functionality. The oscillator measures delays through synchronous elements in a clean loop, while enable control is handled separately through test mode activation that does not interfere with the delay path.

Inventive Principle:
Principle #1Segmentation

2Ease of operation

If conventional testers are used to measure propagation delays, then external testing is possible, but tester tolerances significantly impact measurement accuracy especially for short paths

Engineering Contradiction:
Improveexternal testing capabilityVSAvoidpropagation delay accuracy
Core Design Contradiction:
Ease of operationVSMeasurement precision

Solution Approach 1:

The IC device performs self-testing by containing an internal oscillator that generates test signals and measures propagation delays through its own synchronous elements. This eliminates the need for external testers and their associated tolerance limitations.

Inventive Principle:
Principle #25Self-service

Solution Approach 2:

The patent introduces an intermediary oscillator circuit within the IC that acts as a mediator between the need for testing and the need for accurate delay measurement. This internal oscillator provides a stable reference and measurement mechanism that is not subject to external tester tolerances.

Inventive Principle:
Principle #24Intermediary (Mediator)

3Measurement precision

If synchronous elements are configured in a loop to form an oscillator, then internal delay measurement is possible, but extraneous delays from control circuits contaminate the measurement

Engineering Contradiction:
Improveinternal delay measurement capabilityVSAvoidpure delay signal integrity
Core Design Contradiction:
Measurement precisionVSLoss of information

Solution Approach 1:

The patent extracts the oscillator from any controlling or enabling circuits that would introduce extraneous delays. The synchronous elements are connected in a pure loop where the only delays present are those through the synchronous elements themselves, allowing extraction of clean delay measurements.

Inventive Principle:
Principle #2Taking out (Extraction)

Data Source

PatentUS7482886B1System for measuring propagation delays
Publication Date: 2009.01.27 XILINX INC
  • US7482886B1 patent drawing
  • US7482886B1 patent drawing
  • US7482886B1 patent drawing

AI summary

An oscillator circuit includes an enable circuit to generate an initialization signal and includes a ring oscillator responsive to the initialization signal and having a plurality of synchronous elements connected in a loop, wherein each synchronous element comprises a synchronous input terminal, a clock terminal, a first asynchronous input terminal, and an output terminal coupled to the clock terminal of a next synchronous element and coupled to the first asynchronous input terminal of a previous synchronous element. The enable circuit is independent of a delay path of the ring oscillator, and the ring oscillator generates a test clock signal having a period that does not include any signal delays associated with the enable circuit.