Symmetrical Ring Oscillator Layout for Clock Duty Ratio Matching
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Solution Overview
Problem
Semiconductor devices, particularly flash memory devices, face challenges in accurately matching the duty ratios of clock signals generated by ring oscillators, which is crucial for high-speed data input/output operations.
Innovation Solution
The implementation of a ring oscillator with first to fourth current-controlled delay circuits and differential input-single output converters, arranged symmetrically about a square, allows for adjustable delay times based on sink current, ensuring accurate duty ratio matching of clock signals.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If ring oscillator is used for high-speed data input/output operations, then data transmission speed is improved, but duty ratio matching accuracy deteriorates
Solution Approach 1:
The patent applies asymmetry by intentionally introducing different delay amounts to different clock signals through asymmetric delay circuits. Specifically, first and second clock signals are delayed by different amounts relative to third and fourth clock signals, allowing compensation for routing load differences and achieving duty ratio matching while maintaining high-speed operation
Solution Approach 2:
The patent changes the delay parameter of clock signals by using adjustable delay circuits that can modify signal timing. By controlling the delay amounts of different clock signals independently, the system can adjust duty ratios to match required specifications while operating at high speeds
2Measurement precision
If delay time is adjusted for duty ratio matching, then duty ratio accuracy is improved, but device complexity increases
Solution Approach 1:
The patent merges the delay adjustment function into the existing ring oscillator structure by integrating delay circuits within the oscillator itself. This combination allows duty ratio matching to be achieved without adding separate, complex external timing control circuits, thus improving duty ratio accuracy while limiting the increase in overall device complexity
Data Source
AI summary
A ring oscillator includes first to fourth current-controlled delay circuits configured to allow a delay time to be changed depending on a magnitude of sink current, wherein the first to fourth current-controlled delay circuits are arranged symmetrically to each other about a square.