Ring Oscillator Circuit for Dynamic Fastest-Slowest Selection
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Solution Overview
Problem
Existing methods for determining the fastest or slowest ring oscillator in semiconductor chips require manual monitoring and arithmetic calculations, which are inefficient and not adaptive to changing conditions like noise, temperature, and voltage.
Innovation Solution
A circuit structure comprising multiple delay elements, logic gates, and multiplexers that automatically monitor and dynamically select the fastest or slowest ring oscillator, allowing for feedback to adjust the oscillation frequency based on real-time conditions.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If manual monitoring and arithmetic calculation methods are used to determine the fastest or slowest ring oscillator, then the system can identify extreme frequency oscillators, but the process is inefficient and not adaptive to changing environmental conditions
Solution Approach 1:
The circuit performs self-monitoring through automatic comparison of oscillator frequencies using logic gates and multiplexers, eliminating the need for external manual monitoring and arithmetic calculations. The system automatically identifies extreme frequency oscillators and adapts to environmental changes without external intervention.
Solution Approach 2:
The circuit implements continuous feedback monitoring where the output of each ring oscillator is fed back through logic gates and multiplexers to dynamically compare frequencies and automatically select the extreme frequency oscillator, enabling real-time adaptation to environmental changes.
2Measurement precision
If arithmetic calculation methods are used to determine minimum and maximum frequencies, then the extreme frequency oscillators can be identified, but the calculation overhead is significant
Solution Approach 1:
The patent replaces the mechanical/arithmetic calculation system with an electronic comparison system using logic gates and multiplexers. Instead of performing arithmetic calculations to determine minimum and maximum frequencies, the circuit directly compares oscillator outputs electronically to identify extreme frequency oscillators, significantly reducing computational overhead.
Solution Approach 2:
The logic gates and multiplexers serve as intermediary components that facilitate direct comparison between oscillator frequencies without requiring full arithmetic calculation. These intermediaries enable precise frequency extremum detection through logical comparison operations rather than mathematical computation.
Data Source
AI summary
Aspects of the invention provide a circuit structure that automatically monitors a plurality of ring oscillators and dynamically selects the fastest or the slowest ring oscillator for feedback into the plurality of ring oscillators. In one embodiment, a circuit includes: a plurality of delay elements, each delay element associated with a ring oscillator; a first logic gate for receiving outputs of each of the delay elements; a second logic gate for receiving outputs of each of the delay elements; and a multiplexer for receiving an output of the first logic gate and an output of the second logic gate and choosing one of the outputs, wherein a selection for the multiplexer is based on an output of the multiplexer. To select the fastest ring oscillator, a second multiplexer is provided.


