Ring Oscillator PLL Lock-Time Reduction via Multiphase Monitoring

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Solution Overview

Problem

Existing clocking systems using ring-oscillator based phase-locked loops suffer from long lock times due to the trade-off between power, dynamic range, and temperature drift, which increases latency when entering and exiting low power states, and speeding up the tuning process can result in accuracy penalties.

Innovation Solution

The implementation of a multi-phase frequency measurement apparatus that exploits intermediate phases in a ring oscillator to shorten frequency measurement time while maintaining accuracy, by monitoring intermediate phases to calibrate coarse codes and then fine-tune the oscillator frequency, thereby reducing lock time.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Stability of the object's composition

If multi-band oscillators are used to trade-off power, dynamic range, and tuning range for temperature drift, then temperature stability is improved, but lock time increases

Engineering Contradiction:
Improvetemperature stabilityVSAvoidlock time
Core Design Contradiction:
Stability of the object's compositionVSLoss of time

Solution Approach 1:

The patent segments the frequency measurement process into multiple phases by utilizing intermediate phases of the ring oscillator. Instead of measuring only the final output frequency, the system measures frequencies at multiple intermediate stages (e.g., after different numbers of delay elements), allowing for faster coarse frequency acquisition while maintaining accuracy.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent performs preliminary frequency measurements at intermediate phases before the final frequency determination. By measuring frequencies at intermediate stages of the ring oscillator, the system obtains preliminary data that accelerates the overall frequency measurement and lock acquisition process.

Inventive Principle:
Principle #10Preliminary action

2Loss of time

If the tuning process is sped up to reduce lock time, then lock time decreases, but frequency measurement accuracy deteriorates

Engineering Contradiction:
Improvelock timeVSAvoidfrequency measurement accuracy
Core Design Contradiction:
Loss of timeVSMeasurement precision

Solution Approach 1:

The patent adds a temporal dimension to frequency measurement by utilizing multiple intermediate phases occurring at different times during the ring oscillator operation. This multi-phase approach provides additional measurement data points that maintain accuracy while reducing the overall measurement time required.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Solution Approach 2:

The patent introduces intermediate phase measurements as mediators between the initial state and final frequency determination. These intermediate measurements provide auxiliary information that accelerates the tuning process without sacrificing the accuracy of the final frequency lock.

Inventive Principle:
Principle #24Intermediary (Mediator)

Data Source

PatentUS11387815B2Apparatus and method for improving lock time
Publication Date: 2022.07.12 ALTERA CORP
  • US11387815B2 patent drawing
  • US11387815B2 patent drawing
  • US11387815B2 patent drawing

AI summary

An apparatus is provided to improve lock time of a phase locked loop, wherein the apparatus comprises: a ring oscillator including at least two delay stages, wherein each delay stage has a controllable delay; and a multiphase frequency monitor coupled to the ring oscillator to monitor frequency at an output of at least two delay stages of the ring oscillator.